A manufacturing method of a circuit board and a stamp are provided. The method includes the following steps. A circuit pattern and a dielectric layer covering the circuit pattern are formed on a dielectric substrate. A conductive via connected to the circuit pattern is formed in the dielectric layer. A photoresist material layer is formed on the dielectric layer. An imprinting process is performed on the photoresist material layer using a stamp to form a patterned photoresist layer, wherein the pressing side of the stamp facing the circuit pattern becomes sticky when subjected to pressure so as to catch photoresist residue from the photoresist material layer in the imprinting process. A patterned metal layer is formed on a region exposed by the patterned photoresist layer. The patterned photoresist layer is removed.

A wiring board is provided with: an insulating layer; a base electrode layer layered on one primary surface of the insulating layer in predetermined regions; an insulating covering layer layered on one primary surface of the insulating layer in a state covering parts of edges of the base electrode layer; and a surface electrode layer plated on exposed portions of the base electrode layer not covered by the insulating covering layer, the thickness of covered portions of the base electrode layer covered by the insulating covering layer being less than the thickness of the exposed portions. The surface electrode layer is formed only on the exposed portions of the base electrode layer.

Disclosed is a white coating layer-formed touch screen panel. The coating layer includes a glass substrate, a white coating layers selectively formed on an edge portion of the glass substrate, a black color coating layer selectively formed on an edge portion, and a transparent conductive layer formed on the glass substrate including the edge portion.

A double-sided printed circuit board and method for manufacturing requires a ceramic substrate, two circuit layers, and conductive paste. The ceramic substrate includes two opposite surfaces, and at least one through hole passing through the two opposite surfaces. The two circuit layers can be plated on the two opposite surfaces. The conductive paste is infilled into the full extent of the through hole and thermo-cured, the ingress of electroplating materials into the hole is thus prevented. The method has low process requirement and high reliability in use.

A printed wiring board includes a first resin insulating layer, a conductor layer on the first resin insulating layer, and a second resin insulating layer formed on the first resin insulating layer such that the second resin insulating layer is covering the conductor layer. The conductor layer includes a first circuit having a width of 15 μm or less and a rectangular cross-sectional shape, a second circuit having a trapezoidal cross-sectional shape, a third circuit, a fourth circuit, a fifth circuit, and a sixth circuit, a space between the first and third circuits has a width of 14 μm or less, a space between the first and fourth circuits has a width of 14 μm or less, a space between the second and fifth circuits has a width of 20 μm or more, and a space between the second and sixth circuits has a width of 20 μm or more.

A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.

The present invention comprises a method of manufacturing electronics without PCBs and an apparatus for manufacturing electronics without PCBs.

Disclosed are a package structure of an integrated passive device and a manufacturing method thereof and a substrate. The method includes: providing an organic frame having a chip embedding cavity and a metal pillar, laminating at least one layer of first dielectric on an upper surface of the organic frame, and processing the first dielectric by photolithography to form an opening correspondingly above the chip embedding cavity; mounting an electronic component in the chip embedding cavity through the opening, the electronic component including an upper and lower electrodes; laminating and curing a second dielectric into the chip embedding cavity and on an upper surface of the first dielectric, thinning the first and second dielectrics to expose the upper and lower electrodes, upper and lower surfaces of the metal pillar; performing metal electroplating to form a circuit layer communicated with the upper and lower electrodes and the metal pillar.

A seeded substrate is first prepared. The seeded substrate includes an insulation substrate having a main surface composed of a first region and a second region other than the first region, and a conductive seed layer provided on the first region. Subsequently, a conductive layer is formed on at least the second region to obtain a first treated substrate. An insulation layer is then formed on the first treated substrate. The seed layer is then exposed. A metal layer is then formed on the surface of the seed layer. Here, a voltage is applied between the anode and the seed layer while a solid electrolyte membrane containing a metal ion-containing solution being disposed between the second treated substrate and the anode, and the solid electrolyte membrane and the seed layer being pressed into contact with each other. Thereafter, the insulation layer and the conductive layer are removed.

A printed wiring board according to as aspect of the present invention includes a base film having insulation properties and a conductive pattern including multiple wiring portions laminated, the conductive pattern running on at least one surface of the base film, wherein each wiring portion includes a first conductive portion and a second conductive portion coating an outer surface of the first conductive portion, wherein an average width of each wiring portion is 10 μm or greater to 50 μm or smaller, and an average thickness of the second conductive portion is 1 μm or greater to smaller than 8.5 μm.