A high frequency signal transmission structure includes an insulating sheet and a conductive wiring layer forming on the insulating sheet. The conductive wiring layer includes a silver conductive layer forming on the insulating sheet, a copper conductive layer forming on the silver conductive layer, and a silver covering layer covering a top surface and side surfaces of the copper conductive layer. The silver conductive layer and the silver covering layer together surround the copper conductive layer.

A method for manufacturing a wiring board includes preparing a core substrate having first and second surfaces, forming a first build-up structure including interlayer insulating layers and conductor layers on the first surface of the substrate, and forming a second build-up structure including interlayer insulating layers and one or more conductor layers on the second surface of the substrate. The forming of the first structure includes laminating the insulating layers and metal layers on first surface side of the substrate and forming the conductor layers from all of the metal layers on the first surface side, and the forming of the second structure includes laminating the insulating layers and metal layers on second surface side of the substrate, forming the one or more conductor layers from one or more of the metal layers on the second surface side, and entirely removing the other metal layers on the second surface side.

A circuit board according to an embodiment includes an insulating layer; a second outer circuit pattern disposed on an upper surface of the insulating layer; and a via disposed in the insulating layer and connected to the second outer circuit pattern; wherein the second outer circuit pattern includes: a first pattern embedded in the insulating layer and having a first width; and a second pattern protruding on the upper surface of the insulating layer, having a second width greater than the first width, and connected to the first pattern through the via.

A printed circuit board (PCB) includes: a substrate; and a circuit pattern disposed on the substrate, wherein the circuit pattern includes a first seed layer disposed on the substrate and including a nitride, and a metal layer disposed on the first seed layer.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board comprises the following steps: drilling a hole on a substrate, the hole comprising a blind hole and/or a through hole; on a surface of the substrate, forming a photoresist layer having a circuit negative image; forming a conductive seed layer on the surface of the substrate and a hole wall of the hole; removing the photoresist layer, and forming a circuit pattern on the surface of the substrate, wherein forming a conductive seed layer comprises implanting a conductive material below the surface of the substrate and below the hole wall of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

A method includes providing a layer of non-conductive material having a conductive electroplating seed layer formed on a surface thereof; applying a photoresist layer over the surface of the conductive electroplating seed layer; and defining wiring channels in the photoresist resist layer. The method includes electroplating a conductive material in the defined wiring channels; adhering a non-conductive layer over the photoresist layer and the plated conductive material in the wiring channels; and removing the layer of non-conductive material and the conductive electroplating seed layer.

An elongated wired circuit board including a plurality of wires arranged in parallel, wherein the plurality of wires each includes a first linear portion extending in a first linear direction, a second linear portion extending in a second linear direction, and a connection portion, the connection portion includes a first side, a second side, a third side, and a fourth side, length y1 and length S satisfy 0<y1<S, length y1 extending from the first corner portion reaching the first widthwise other end edge of the first linear portion, and length S extending from the first widthwise other end edge of the first linear portion of one wire, and the predetermined angle θ satisfies 0<θ<1 deg.

Provided are an electronic component manufacturing method by which even a platable layer made of a difficult-to-plate material can be easily plated with good adhesion without using a special chemical solution or a photolithography technique, and an electronic component which has a peel strength of 0.1 N/mm or greater as measured by a copper foil peel test. A picosecond laser beam having a pulse duration on the order of a picosecond or a femtosecond laser beam having a pulse duration on the order of a femtosecond is emitted at a surface of a platable layer (2) in order to roughen the surface, a wiring pattern is formed using a mask (13), and a plated part (12) is formed on the surface of the wiring pattern.

Provided is a method for manufacturing a wiring board that forms a wiring layer having favorable adhesion without a resin resist pattern. A method prepares a substrate with seed-layer including: a underlayer on the surface of an insulating substrate; and a seed layer on the surface of the underlayer, the seed layer having a predetermined pattern and containing metal; presses a solid electrolyte membrane against the seed layer and the underlayer, and applies voltage between an anode and the underlayer to reduce metal ions in the membrane and form a metal layer on the surface of the seed layer; and removes an exposed region without the seed layer and the metal layer of the underlayer to form a wiring layer including the underlayer, the seed layer and the metal layer on the surface of the substrate.

A method of forming an electronics assembly includes providing a substrate, attaching an electronics component to the substrate, disposing one or more dielectric ramps on the substrate along at least a portion of a perimeter of the electronics component, disposing a first ground plane over the substrate and the dielectric ramp(s), disposing a first dielectric over the first ground plane, disposing a stripline over the first dielectric, disposing a second dielectric over the stripline and the first dielectric, and disposing a second ground plane over the second dielectric.