Patent classifications
H05K3/26
METHOD FOR IMPROVING THE COLOUR DIFFERENCE OF LED DISPLAY SCREEN
The present application provides a method for improving colour difference of an LED display screen, comprising: drilling and polishing circuit surfaces of a plurality of LED substrates; performing screen printing on the circuit surfaces of the plurality of LED substrates, and performing oil skimming on a mesh screen during the screen printing every other preset printing cycle in such a way that an ink on the mesh screen has a viscosity within a predetermined viscosity range; performing an exposure setting process on the plurality of LED substrates that have been screen printed to obtain a plurality of LED printed circuit boards; and finally assembling the plurality of LED printed circuit boards to form an LED display screen.
A MANUFACTURING PROCESS TO ENHANCE SURFACE MOUNT SOLDER PAD JOINT FORMATION VIA A LASER SUBTRACTIVE METHOD
The present invention relates to the field of electronic assembly for the manufacture of electronic products such as mobile phones, where electronic components such as resistors and capacitors and microprocessors are joined to a bare circuit board to form a complete electronics device and relates to the preparation of attachment locations on a bare circuit board
A MANUFACTURING PROCESS TO ENHANCE SURFACE MOUNT SOLDER PAD JOINT FORMATION VIA A LASER SUBTRACTIVE METHOD
The present invention relates to the field of electronic assembly for the manufacture of electronic products such as mobile phones, where electronic components such as resistors and capacitors and microprocessors are joined to a bare circuit board to form a complete electronics device and relates to the preparation of attachment locations on a bare circuit board
Binary azeotrope and azeotrope-like compositions comprising perfluoroheptene
The present application provides binary azeotrope or azeotrope-like compositions comprising perfluoroheptene and an additional component, wherein the additional component is present in the composition in an amount effective to form an azeotrope composition or azeotrope-like composition with the perfluoroheptene. Methods of using the compositions provided herein in cleaning and carrier fluid applications are also provided.
CONCENTRATED LIQUID OF POLISHING COMPOSITION AND POLISHING METHOD USING SAME
An object of the present invention is to provide a unit capable of improving redispersibility in a concentrated liquid of a polishing composition containing alumina as abrasive grains. There is provided a concentrated liquid of a polishing composition which includes: particulate alumina; colloidal alumina having an aspect ratio of more than 5 and 800 or less; at least one phosphorus-containing acid selected from the group consisting of phosphoric acid, phosphoric acid condensates, organic phosphoric acids, phosphonic acids, and organic phosphonic acids; and water, where a pH of the concentrated liquid of the polishing composition is 2 or more and 4.5 or less.
CONCENTRATED LIQUID OF POLISHING COMPOSITION AND POLISHING METHOD USING SAME
An object of the present invention is to provide a unit capable of improving redispersibility in a concentrated liquid of a polishing composition containing alumina as abrasive grains. There is provided a concentrated liquid of a polishing composition which includes: particulate alumina; colloidal alumina having an aspect ratio of more than 5 and 800 or less; at least one phosphorus-containing acid selected from the group consisting of phosphoric acid, phosphoric acid condensates, organic phosphoric acids, phosphonic acids, and organic phosphonic acids; and water, where a pH of the concentrated liquid of the polishing composition is 2 or more and 4.5 or less.
Printed circuit board trace for galvanic effect reduction
Devices and methods are described for reducing etching due to galvanic effect within a printed circuit board that may be used, for example, in a data storage device, such as a card-type data storage device. Specifically, a contact trace is coupled to a contact finger that has a substantially larger surface area than the contact trance, and that is configured to couple the data storage device to a host device. The contact trace is electrically isolated from the rest of the circuitry during a fabrication process. The contact finger and an exposed portion of the contact trace are plated with a common material to reduce galvanic etching of the contact trace during fabrication. The contact trace is then connected to an impedance trace though at least one of a component and a bond wire.
Resin multilayer substrate, electronic component, and mounting structure thereof
A resin multilayer substrate includes a plurality of insulating resin base material layers and a plurality of conductor patterns provided on the plurality of insulating resin base material layers. The plurality of conductor patterns include a plurality of signal lines provided at positions not overlapping each other as viewed from a laminating direction of the insulating resin base material layers, and a ground conductor overlapping the plurality of the signal lines as viewed from the laminating direction. Openings are provided in the ground conductor and, as viewed from the laminating direction, an aperture ratio is higher in an inner zone that is sandwiched between two signal lines than in an outer zone of the two signal lines.
Method for producing a printed circuit board structure
A method for producing a printed circuit board structure comprising at least one insulation layer, at least one conductor layer, and at least one embedded component having a contact pad that has an outer barrier layer, in which structure at least two conductor paths/conductor layer are connected to at least two connections using vias, and each via runs from a conductor path/conductor layer directly to the barrier contact layer of the corresponding connection of the component.
Method for producing a printed circuit board structure
A method for producing a printed circuit board structure comprising at least one insulation layer, at least one conductor layer, and at least one embedded component having a contact pad that has an outer barrier layer, in which structure at least two conductor paths/conductor layer are connected to at least two connections using vias, and each via runs from a conductor path/conductor layer directly to the barrier contact layer of the corresponding connection of the component.