A circuit board with improved heat dissipation function and a method for manufacturing the circuit board are provided. The circuit board includes a heat dissipation substrate, an insulating layer on the heat dissipation substrate, an electronic component, a base layer on the insulating layer, and a circuit layer on the base layer. The heat dissipation substrate includes a phase change structure and a heat conductive layer wrapping the phase change structure. The heat dissipation substrate defines a first through hole. The insulating layer defines a groove for receiving the electronic component. A second through hole is defined in the circuit layer, the base layer, and the insulating layer. A bottom of the second through hole corresponds to the heat conductive layer. A heat conductive portion is disposed in the second through hole.

A wiring substrate includes a first insulating layer with a first opening, a second insulating layer with a second opening, a high-frequency wiring layer, a first wiring layer, a second wiring layer, and a plurality of conductive pillars. The high-frequency wiring layer including a high-frequency trace is sandwiched between the first insulating layer and the second insulating layer. The first opening and the second opening expose two sides of the high-frequency trace respectively. The high-frequency trace has a smooth surface which is not covered by the first insulating layer and the second insulating layer and has the roughness ranging between 0.1 and 2 μm. The first insulating layer and the second insulating layer are all located between the first wiring layer and the second wiring layer. The conductive pillars are disposed in the second insulating layer and connected to the high-frequency trace.

A component-embedded substrate includes: insulating layers each including a wiring pattern; an embedded component including a connection terminal; a plurality of vias that electrically connect the connection terminal to the wiring patterns adjacent to each other in a lamination direction. Each of the vias is composed of a via hole in the insulating layer and a conductive material in the via hole. One of the vias is a connection via connected to the connection terminal, and another of the vias is an adjacent via adjacent to the connection via in the lamination direction. The connection via and adjacent via overlap in a plan view. S1/A1≤0.61 and S1/A2≤0.61 are satisfied, where A1 is an average cross-sectional area of the connection via, A2 is an average cross-sectional area of the adjacent via, and S1 is an overlapping area of the connection via and adjacent via in the plan view.

In an antenna in package structure, a plurality of supporting blocks spaced apart from each other are disposed between a first substrate and a second substrate, and an antenna cavity is formed between every two adjacent supporting blocks. Therefore, a height of the supporting block determines a height of the antenna cavity. The supporting blocks spaced apart from each other are located between the first substrate and the second substrate, and at least one of the first substrate or the second substrate adheres to the supporting blocks spaced apart from each other using an adhesive layer.

Embodiments provide a package substrate. The package substrate includes a substrate having a cavity hole therein, and a semiconductor device in the cavity hole. The semiconductor device has first terminal side and a second terminal side opposite to the first terminal side. The package substrate further includes a first redistribution structure on the first terminal side of the cavity substrate to electrically couple to a first pad and a second pad on the first terminal side of the semiconductor device; and a second redistribution structure on the second side of the cavity substrate to electrically couple to a third pad and fourth pad on the second terminal side of the semiconductor device.

Disclosed is a method of manufacturing a stretchable substrate according to various embodiments of the present disclosure for realizing the above-described objectives. The method may include generating an auxetic including a plurality of unit structures and adhering one or more elastic sheets to one surface of the auxetic.

A wiring substrate includes an insulating layer, and a build-up part formed on the insulating layer and including an interlayer insulating layer and a conductor layer. The build-up part has a cavity penetrating through the build-up part such that the cavity is formed to accommodate an electronic component and has an inner wall and a bottom surface having a groove and that the groove is extending entirely in an outer edge part of the bottom surface and formed continuously from the inner wall surface of the cavity.

A method of manufacturing a device is provided. The method includes forming a first cavity in a first substrate with the first cavity having a first depth. A second cavity is formed in a second substrate with the second cavity having a second depth. The first cavity and the second cavity are aligned with each other. The first substrate is affixed to the second substrate to form a waveguide substrate having a hollow waveguide with a first dimension substantially equal to the first depth plus the second depth. A conductive layer is formed on the sidewalls of the hollow waveguide. The waveguide substrate is placed over a packaged semiconductor device, the hollow waveguide aligned with a launcher of the packaged semiconductor device.

Panels of LED arrays and LED lighting systems are described. A panel includes a substrate having a top and a bottom surface. Multiple backplanes are embedded in the substrate, each having a top and a bottom surface. Multiple first electrically conductive structures extend at least from the top surface of each of the backplanes to the top surface of the substrate. Each of multiple LED arrays is electrically coupled to at least some of the first conductive structures. Multiple second conductive structures extend from each of the backplanes to at least the bottom surface of the substrate. At least some of the second electrically conductive structures are coupled to at least some of the first electrically conductive structures via the backplane. A thermal conductive structure is in contact with the bottom surface of each of the backplanes and extends to at least the bottom surface of the substrate.

A printed circuit board includes: a first substrate including a first cavity and first circuit units; and a second substrate disposed in the first cavity of the first substrate with an electronic component disposed therein, and including second circuit units having a higher density than the first circuit units, wherein the second substrate includes a first region and a second region, the first region of the second substrate includes an outermost circuit layer among the second circuit units, and circuit layers in the first region of the second substrate have a higher density than circuit layers in the second region of the second substrate.