Technologies for switching network traffic include a network switch. The network switch includes one or more processors and communication circuitry coupled to the one or more processors. The communication circuitry is capable of switching network traffic of multiple link layer protocols. Additionally, the network switch includes one or more memory devices storing instructions that, when executed, cause the network switch to receive, with the communication circuitry through an optical connection, network traffic to be forwarded, and determine a link layer protocol of the received network traffic. The instructions additionally cause the network switch to forward the network traffic as a function of the determined link layer protocol. Other embodiments are also described and claimed.

Housing structure for PCI Express expansion electronic boards able to mechanically stabilize said PCI Express expansion electronic boards so as to guarantee the correct functioning, performance and integrity of the electric interconnection between them and the basic electronic board to which they are connected if there are mechanical stresses such as knocks or vibrations, in order to be able to use PCI Express expansion electronic boards in the automotive field, or in scenarios characterized by perturbations of the important mechanical type. The present invention also concerns an assembly method of the housing structure.

Examples may include sleds for a rack in a data center including physical compute resources and memory for the physical compute resources. The memory can be disaggregated, or organized into near and far memory. A first sled can comprise the physical compute resources and a first set of physical memory resources while a second sled can comprise a second set of physical memory resources. The first set of physical memory resources can be coupled to the physical compute resources via a local interface while the second set of physical memory resources can be coupled to the physical compute resources via a fabric.

Technologies for adaptive processing of multiple buffers is disclosed. A compute device may establish a buffer queue to which applications can submit buffers to be processed, such as by hashing the submitted buffers. The compute device monitors the buffer queue and determines an efficient way of processing the buffer queue based on the number of buffers present. The compute device may process the buffers serially with a single processor core of the compute device or may process the buffers in parallel with single-instruction, multiple data (SIMD) instructions. The compute device may determine which method to use based on a comparison of the throughput of serially processing the buffers as compared to parallel processing the buffers, which may depend on the number of buffers in the buffer queue.

Out-of-band management techniques for networking fabrics are described. In an example embodiment, an apparatus may comprise a packet-switched network interface to deconstruct a packet received via an out-of-band management network and control circuitry to execute an out-of-band management agent, and the out-of-band management agent may be operative to identify a configuration command comprised in the received packet and control an optical circuit-switched network interface based on the configuration command. Other embodiments are described and claimed.

A computing system including a housing assembly having a front and a rear, a CPU module positioned towards the front of the housing assembly and including a plurality of I/O connectors, and a plurality of I/O modules positioned towards the rear of the housing assembly, where each I/O module includes a second I/O connector. The computing system also includes a plurality of riser cards each having a PCB with opposing side surfaces, a front edge, a rear edge, a top edge, a bottom edge, a third I/O connector coupled to the bottom edge and a fourth I/O connector coupled to the rear edge. The third I/O connector on each riser card is connected to one of the first I/O connectors and the fourth I/O connector on each riser card is connected to one of the second I/O connectors so that the riser cards are oriented in parallel with each other.

According to an example, a holder for a computing device comprises a first bracket, a second bracket, and a biasing element attached to the first bracket and the second bracket. The first bracket may comprise a first clamp to contact a first side of a computing component and a first attachment member to attach to the computing device so as to fix the first bracket within the computing device. The second bracket may comprise a second clamp to contact a second side of the computing component and aligned with the first clamp. The biasing element may bias the second clamp towards the first clamp.

Technologies for dynamically managing resources in disaggregated accelerators include an accelerator. The accelerator includes acceleration circuitry with multiple logic portions, each capable of executing a different workload. Additionally, the accelerator includes communication circuitry to receive a workload to be executed by a logic portion of the accelerator and a dynamic resource allocation logic unit to identify a resource utilization threshold associated with one or more shared resources of the accelerator to be used by a logic portion in the execution of the workload, limit, as a function of the resource utilization threshold, the utilization of the one or more shared resources by the logic portion as the logic portion executes the workload, and subsequently adjust the resource utilization threshold as the workload is executed. Other embodiments are also described and claimed.

A fixing device includes a base, a fastening assembly, a fixing assembly and a first recovery member. The base has a rail be inserted by a board card. The fastening assembly is movably coupled to the base and detachably secures the board card. The fastening assembly includes a sliding member and a rotation member. The sliding member is slidably connected to the base. The rotation member is pivotally connected to the sliding member and includes an abutting end and a latch end. The rotation member selectively causes the abutting end and the latch end to be inserted into the rail. The fixing assembly is connected to the base and the fastening assembly, and secures the fastening assembly in a locked status. The first recovery member moves the fastening assembly from the fixed position toward an entrance of the rail when the locked status is released.

A supporting structure of optimized volume includes at least two vertical structural elements having a front face and a rear face. Modules including electronic equipment items are fixed onto the front face of the vertical structural elements. Use in particular can be for the integration of avionics modules on aircraft.