Patent classifications
H05K2201/0332
Multilayer wiring substrate
A plate-shaped multilayer wiring substrate includes at least two resin layers stacked on top of each other and each including an insulating base and a conductive pattern provided on the insulating base, and a front surface layer joined onto the resin layers stacked. The front surface layer has a higher elastic modulus than an elastic modulus of the insulating bases. A joint interface between the resin layers and the front surface layer includes projections and depressions. Also, a method for manufacturing the plate-shaped multilayer wiring substrate includes a step of stacking, on top of resin layers, a front surface layer having a higher elastic modulus than an elastic modulus of the resin layers, and a step of performing pressing under pressure from above the front surface layer by using a flat surface in a heated state to join the resin layers and the front surface layer.
PLATED LAMINATE AND PRINTED CIRCUIT BOARD
Provided is a plating lamination technology for providing a highly adhesive inner layer of a printed circuit board. The plating lamination technology is effective in providing an electroless plated laminate, including a non-etched/low-roughness pretreated laminate or a low-roughness copper foil, and a printed circuit board including the plated laminate.
Conductive pattern
Provided is a conductive pattern having at least one unit conductive pattern forming one touch pixel according to an aspect of the present invention. The at least one unit conductive pattern includes a plurality of nanostructures each having opposite ends. A ratio of nanostructures, both opposite ends of which are in contact with edges of the at least one unit conductive pattern to all nanostructures included in the at least one unit conductive pattern is 70% or more.
CONNECTING METHOD, CONNECTING STRUCTURE AND CONNECTION TERMINAL ASSEMBLY
A connection terminal is placed with an opening end of a recessed portion of the connection terminal contacting a top of a flexible substrate, a linking conductive member is pushed from a bottom toward a top of the flexible substrate, whereby the linking conductive member projects inside the recessed portion through the opening end as catching a part of the flexible substrate, and the part of the flexible substrate is sandwiched between a pressing portion of the linking conductive member and a first inner portion in the recessed portion to allow the pressing portion to contact a conductive portion exposed on the bottom of the flexible substrate and allow a contact portion of the linking conductive member to contact a second inner portion in the recessed portion, whereby the connection terminal is electrically connected to the conductive portion of the flexible substrate via the linking conductive member.
CONDUCTIVE STRUCTURE INCLUDING COPPER-PHOSPHOROUS ALLOY AND A METHOD OF MANUFACTURING CONDUCTIVE STRUCTURE
The present disclosure provides a method for forming a multilayer wiring structure, which includes: forming a patterned copper-phosphorous alloy layer over a carrier by performing a plating operation, and forming a dielectric layer over the patterned copper-phosphorous alloy layer. The forming the patterned copper-phosphorous alloy layer includes providing a plating solution having a copper source and a phosphorous source.
Printed wiring board
A printed wiring board includes: an insulating base material; a first conductive layer disposed on a main surface of the insulating base material in a first region and a second region defined on a plane along the main surface; a second conductive layer disposed on a main surface of the first conductive layer in the first region; and an insulating layer disposed on the main surface of the first conductive layer in the second region. The ratio of a first evaluation value E1 to a second evaluation value E2 is 0.91 or more and 0.99 or less. The first evaluation value E1 is an evaluation value of strength of a first laminated part in the first region and the second evaluation value E2 is an evaluation value of strength of a second laminated part in the second region.
MULTILAYER WIRING SUBSTRATE
A plate-shaped multilayer wiring substrate includes at least two resin layers stacked on top of each other and each including an insulating base and a conductive pattern provided on the insulating base, and a front surface layer joined onto the resin layers stacked. The front surface layer has a higher elastic modulus than an elastic modulus of the insulating bases. A joint interface between the resin layers and the front surface layer includes projections and depressions. Also, a method for manufacturing the plate-shaped multilayer wiring substrate includes a step of stacking, on top of resin layers, a front surface layer having a higher elastic modulus than an elastic modulus of the resin layers, and a step of performing pressing under pressure from above the front surface layer by using a flat surface in a heated state to join the resin layers and the front surface layer.
Tamper detection circuits
In an example, a process includes forming a patterned layer on a polymer substrate. The process also includes depositing a graphene-containing material on the patterned layer to form a plurality of graphene traces of a tamper detection circuit.
Tamper detection circuits
In an example, a polymeric material is disclosed. The polymeric material includes a polymer substrate and a plurality of graphene traces arranged to form a tamper detection circuit on the polymer substrate.
PRINTED WIRING BOARD
A printed wiring board includes: an insulating base material; a first conductive layer disposed on a main surface of the insulating base material in a first region and a second region defined on a plane along the main surface; a second conductive layer disposed on a main surface of the first conductive layer in the first region; and an insulating layer disposed on the main surface of the first conductive layer in the second region. The ratio of a first evaluation value E1 to a second evaluation value E2 is 0.91 or more and 0.99 or less. The first evaluation value E1 is an evaluation value of strength of a first laminated part in the first region and the second evaluation value E2 is an evaluation value of strength of a second laminated part in the second region.