Patent classifications
H05K2201/068
Method of fabricating a glass substrate with a plurality of vias
Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to a second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor element, a circuit board, metal wires, and an expanding member. The circuit board has an upper surface and a lower surface opposite the upper surface. The metal wires arc formed on at least one of the upper surface and the lower surface. At least two connection terminals are formed in a terminal formation surface of the semiconductor element which is disposed so as to face the upper surface of the circuit board. The expanding member is fixed to the terminal formation surface of the semiconductor element, has a larger coefficient of linear thermal expansion than the semiconductor element, and has a size larger than the interval between adjacent two of the at least two connection terminals.
CIRCUIT BOARD
A circuit board includes a rigid board including a first wiring layer formed on its upper surface side, and a flexible board including a base material having flexibility and disposed on an upper surface side of the first wiring layer, a second wiring layer formed on the base material, and a via wiring formed in a through-hole passing through the second wiring layer and the base material. The via wiring has a protrusion protruding from an upper surface of the second wiring layer, and extending on the upper surface of the second wiring layer positioned on an outer circumferential side of the through-hole.
SUBSTRATE WARPAGE REDUCTION TECHNIQUES WITH LAMINATE GLASS CLOTH WEAVE
Warpage reduction through laminate glass cloth design modification is described herein. In one example, a substrate for a microelectronic assembly, includes one or more glass-cloth containing layers. At least one of the glass-cloth containing layers includes a glass cloth having a weave including: a first plurality of parallel glass fibers, a second plurality of parallel glass fibers, and a third plurality of parallel glass fibers interwoven with one another in a plane. The second plurality of parallel glass fibers crosses the first plurality of glass fibers at a first angle, and the third plurality of parallel glass fibers crosses the first plurality of glass fibers at a second angle and crosses the second plurality of glass fibers at a third angle. In one example, the glass cloth weave includes a hexagonal pattern.
POWER DECOUPLING ATTACHMENT
An embodiment of the invention may include a method, and resulting structure, of forming a semiconductor structure. The method may include forming a component hole from a first surface to a second surface of a base layer. The method may include placing an electrical component in the component hole. The electrical component has a conductive structure on both ends of the electrical component. The electrical component is substantially parallel to the first surface. The method may include forming a laminate layer on the first surface of the base layer, the second surface of the base layer, and between the base layer and the electrical component. The method may include creating a pair of via holes, where the pair of holes align with the conductive structures on both ends of the electrical component. The method may include forming a conductive via in the pair of via holes.
CIRCUIT BOARD AND ELECTRONIC DEVICE
A circuit board includes an insulating substrate; a metal circuit sheet joined to a first principal surface of the insulating substrate; and a heat dissipating sheet made of metal and joined to a second principal surface of the insulating substrate, the second principal surface being opposite the first principal surface. The thickness of the heat dissipating sheet is at least 3.75 times the thickness of the metal circuit sheet. The size of metal grains contained in the heat dissipating sheet is smaller than the size of metal grains contained in the metal circuit sheet, and decreases with increasing distance from the second principal surface of the insulating substrate.
Organic Silicone Resin Composition and Pre-preg, Laminate, Copper-clad Laminate, and Aluminum Substrate that Use the Composition
The present invention relates to an organic silicone resin composition and a prepreg, a laminate, and an aluminum substrate that use the composition. The organic silicone resin composition comprises in terms of parts by weight: 100 parts of a condensation-type silicone resin, 0.0001-2 parts of a catalyst, and 0.001-10 parts of an additive. The organic silicone resin composition has the advantages of high heat resistance, halogen-free and phosphorus-free flame retardancy, improved peel strength with copper foil, and low coefficient of expansion, and is applicable in manufacturing the pre-preg, the laminate, and the aluminum substrate for used in a high-performance printed circuit.
CIRCUIT ASSEMBLY AND METHOD FOR MANUFACTURING SAME
Provided are a circuit assembly in which it is possible to eliminate or reduce a level difference between a mounting surface of a substrate and portions to which terminals that are electrically connected to a conductive member are connected, and that can be easily produced, and a method for manufacturing the same. A circuit assembly includes a substrate provided with openings and an electronic component mounted on one side of the substrate, a conductive member that is a plate-shaped member fixed to another side of the substrate, the conductive member constituting a conductive path, and a relay member that is fixed to a surface on the substrate side of the conductive member and made of an electrically conductive material, the relay member being accommodated in the openings formed in the substrate, at least one terminal of the electronic component being connected to the relay member.
Flexible hybrid interconnect circuits
Provided are flexible hybrid interconnect circuits and methods of forming thereof. A flexible hybrid interconnect circuit comprises multiple conductive layers, stacked and spaced apart along the thickness of the circuit. Each conductive layer comprises one or more conductive elements, one of which is operable as a high frequency (HF) signal line. Other conductive elements, in the same and other conductive layers, form an electromagnetic shield around the HF signal line. Some conductive elements in the same circuit are used for electrical power transmission. All conductive elements are supported by one or more inner dielectric layers and enclosed by outer dielectric layers. The overall stack is thin and flexible and may be conformally attached to a non-planar surface. Each conductive layer may be formed by patterning the same metallic sheet. Multiple pattern sheets are laminated together with inner and outer dielectric layers to form a flexible hybrid interconnect circuit.
FLEX-LESS MULTILAYER CERAMIC SUBSTRATE
In one example embodiment, an optoelectronic assembly includes a multilayer ceramic substrate that includes multiple ceramic layers and a via disposed through at least one of the ceramic layers. The via may be formed from a conductive material that is configured to communicate a signal through the via. The multilayer ceramic substrate may be configured to dissipate heat emitted by an electronic component coupled to the multilayer ceramic substrate.