An electronic device includes a printed circuit board (PCB). The PCB includes first and second grids disposed at a top surface and a bottom surface of the PCB, respectively. Each grid includes a plurality of footprint pins, and a plurality of vias extending through the PCB to the top and bottom surfaces. Each footprint pin includes a connecting end and a free end that opposes the connecting end. Each via includes a contact end located at one of grids and is in electrical contact with the connecting end of one of the footprint pins, and each via further includes a non-contact end that is located at the other of the grids and is not in electrical contact with any of the footprint pins. First and second connectors are mounted to the PCB top and bottom surfaces and connect with the footprint pins of the first and second grids.

A method of manufacturing a component carrier is disclosed. The method includes providing an electrically insulating layer structure having a front side and a back side, wherein the front side is covered by a first electrically conductive layer structure and the back side is covered by a second electrically conductive layer structure, carrying out a first opening process, such as a first laser drilling, through the first electrically conductive layer structure and into the electrically insulating layer structure from the front side to thereby form a blind hole in the electrically insulating layer structure, and thereafter carrying out a second opening process, such as a second laser drilling, through the second electrically conductive layer structure and through the electrically insulating layer structure from the back side to thereby extend the blind hole into a through hole, in particular a laser through hole, with substantially trapezoidal shape.

The invention relates to a method for manufacturing (S) an electronic board (1) comprising the following steps: forming (S1, S4) a cavity (20) in the conductive skin layer (C.sub.1) and in an underlying insulating layer (10), so that at least part of a solder pad (4) is exposed, filling (S5) the cavity (20) with a solder paste (24), placing (S6) an SMD (3) opposite the cavity (20), soldering the SMD (3) on the electronic board (1).

A circuit board assembly of an information handling system has stepped diameter vias that carry communication signals through printed circuit board (PCB) substrates. Each stepped diameter via has a first barrel portion of a first diameter that is drilled through a first portion of the PCB substrates and that is at least lined with a conductive material to electrically conduct a selected one of: (i) a direct current and (ii) a communication signal from an outer layer to an internal layer of the more than one PCB substrate. Each stepped diameter via further includes a second barrel portion that extends from the first barrel portion deeper into the PCB substrates. The second barrel portion has a second diameter that is less than the first diameter and the smaller second diameter improves signal integrity (SI).

Various back-drilled via probing techniques are described. In some cases, a screw may be utilized to establish a conductive pathway through a voided portion of a back-drilled via to a plated portion of the back-drilled via to enable back-drilled via probing. In other cases, a combination of solder paste and a wire may be utilized to establish the conductive pathway to enable back-drilled via probing. In other cases, a compliant pin that includes a metallized particle interconnect material may be utilized to establish the conductive pathway to enable back-drilled via probing. In other cases, a combination of an ultraviolet curable film and a light pipe may be utilized to establish a conductive pathway the conductive pathway to enable back-drilled via probing.

This application provides a multilayer printed circuit board (PCB). There is a pad array on a surface of the multilayer PCB. The pad array includes at least one padding unit, and each padding unit includes a first pad and a second pad that are adjacent. Both the first pad and the second pad are connected to a first Z-directed transmission line located in a Z-directed groove. In this way, to wire a signal wire on a signal layer of the multilayer PCB, a quantity of Z-directed grooves that need to be bypassed is less than a quantity of vias that need to be bypassed in the prior art. In other words, wiring of the signal wire is easier to some extent. In addition, this application further provides a corresponding communications device.

According to an embodiment, a printed circuit board and an electronic device is disclosed. The printed circuit board includes a first pattern configured to be formed in a first layer. The printed circuit board also includes a second pattern configured to be formed in at least one second layer under the first layer. The printed circuit board also includes a via configured to electrically connect the first pattern to the second pattern. The printed circuit board further includes a recess configured to be formed by removing at least a portion of an area in which the via is formed and to electrically separate the first pattern from the second pattern.

A printed circuit board (PCB) may include a plurality of horizontally disposed signal layers. The PCB may include a first vertically disposed differential via electrically connected to a first horizontally disposed signal layer, of the plurality of horizontally disposed signal layers, and a second horizontally disposed signal layer of the plurality of horizontally disposed signal layers. The PCB may include a second vertically disposed differential via electrically connected to the first signal horizontally disposed layer and the second horizontally disposed signal layer. The PCB may include a first set of clearances encompassing the first vertically disposed differential via and the second vertically disposed differential via, a second set of clearances encompassing the first vertically disposed stub, and a third set of clearances encompassing the second vertically disposed stub.

A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a via plug with a specialized geometry and including a capillary is inserted into each via to allow electroplating on only preferred wall surfaces of the vias. Then a board plating process of the PCB manufacturing is performed.

Disclosed herein is a system for drilling in a multilayer printed circuit board. The system includes a source of electromagnetic radiation configured to transmit a measurement pulse in open air to a workpiece, an anode, a resettable electric charge sensor (ECS), operably connected to the anode, and a control unit, configured to receive at least one value indicative of the quantity of at least part of charged molecules received at the anode and determine a second value indicative of the quantity of charged molecules received at the anode that were derivative of emitted electrons responsive to the measurement pulse.