Laminated interposers and packages, with embedded trace interconnects are provided. An example process for making an interposer or package achieves vertical conductive vias in the package by depositing conductive traces on multiple wafers or panes, then laminating these substrates into a stack, thereby embedding the conductive traces. The laminated stack is sliced to dimensions of an interposer or electronic package. A side of the sliced stack is then used as the top of the interposer or package, rendering some of the horizontally laid traces into vertical conductive vias. The interposer or package can be finished or developed by adding redistribution layers on the top and bottom surfaces, and active and passive components. Electronic components can also be embedded in the laminated stack. Some of the stack layers can be active dies, such as memory controllers, memory storage arrays, and processors, to form a memory subsystem or self-contained computing device.

Laminated interposers and packages, with embedded trace interconnects are provided. An example process for making an interposer or package achieves vertical conductive vias in the package by depositing conductive traces on multiple wafers or panes, then laminating these substrates into a stack, thereby embedding the conductive traces. The laminated stack is sliced to dimensions of an interposer or electronic package. A side of the sliced stack is then used as the top of the interposer or package, rendering some of the horizontally laid traces into vertical conductive vias. The interposer or package can be finished or developed by adding redistribution layers on the top and bottom surfaces, and active and passive components. Electronic components can also be embedded in the laminated stack. Some of the stack layers can be active dies, such as memory controllers, memory storage arrays, and processors, to form a memory subsystem or self-contained computing device.

A resin multilayer substrate includes a laminate including resin layers including a first resin layer and a second resin layer that are laminated, a via conductor in the first resin layer, and a joint portion that includes at least a portion in the second resin layer and is joined to the via conductor. The joint portion is more brittle than the via conductor. A linear expansion coefficient of the second resin layer is larger than a linear expansion coefficient of the via conductor and a linear expansion coefficient of the joint portion, and is smaller than a linear expansion coefficient of the first resin layer.

An interposer for mechanically and electrically connecting two circuit boards is described. The interposer can be bent to enclose an area of a circuit board. The interposer can include a first layer external to the enclosed area. The first layer can be conductive and can serve as an EMI shield. The interposer can also include a second layer internal to the enclosed area. The second layer can be non-conductive but can carry multiple discrete pins that can electrically couple the first and second circuit boards and provide signal transmission pathways between the circuit boards. The interposer can be formed by folding a sheet of conductive material having different cutout regions that forms a comb pattern into multiple stacked layers. Then, the bent regions that connect the stacked layers can be removed so that the conductive bars in the comb patterns can be separated and isolated to form discrete pins.

A method for fabricating a flexible substrate and a flexible substrate prefabricated component are disclosed, the flexible substrate comprises an electronic device and a flexible layer provided with the electronic device. The fabrication method comprises: disposing a single-sided adhesive layer at a central portion of a surface of a support substrate, an adhesive side of the single-sided adhesive layer being in contact with the support substrate; disposing a double-sided adhesive layer at a peripheral region of the support substrate; disposing the flexible layer on surfaces of the single-sided adhesive layer and the double-sided adhesive layer, the flexible layer being bonded to the double-sided adhesive layer; disposing the electronic device in a region of a surface of the flexible layer corresponding to the single-sided adhesive layer; cutting the flexible layer along a boundary of the electronic device and removing the flexible layer from the single-sided adhesive layer.

A microelectronic package comprises at least one substrate and at least one semiconductor die. The substrate includes a multi-region core layer and one or more metal and insulating layers which are stacked on upper and lower sides of the core layer, wherein the core layer includes one or more inner cores with a lower CTE for better matching with the low CTE of semiconductor dies and an outer core with a higher CTE for better matching with the high CTE of PCB on which the package is mounted. Each inner core is positioned at a corresponding die shadow region, and the outer core is positioned outside each die shadow region. The ceramic or glass and organic materials may be respectively selected for the inner and outer cores. The microelectronic package based on the substrate may better meet the reliability requirements on both component and board level.

A component carrier with a stack including at least one electrically conductive layer structure and at least one electrically insulating layer structure, a cavity formed in the stack and delimited by a bottom wall and a sidewall, and an electrically conductive laser protection structure at least in an edge region between the bottom wall and the sidewall.

A laminating system includes a laminating device including a laminating roll device that applies a dry film onto a seed layer formed on a surface of a resin insulating layer, and a pressure application device positioned such that the pressure application device applies heat and pressure to the dry film.

A method for manufacturing a printed wiring board includes forming a seed layer on a surface of a resin insulating layer, applying a dry film onto the seed layer using a laminating roll device, cutting the dry film applied onto the seed layer to a predetermined size, applying pressure and heat to the dry film, forming a plating resist on the seed layer from the dry film using photographic technology, forming an electrolytic plating film on part of the seed layer exposed from the resist, removing the resist from the seed layer, and removing the part of the seed layer exposed from the electrolytic plating film. The applying of the pressure and heat includes applying the pressure and heat to the dry film applied onto the seed layer such that the pressure and heat are applied to the entire surface of the dry film cut to the predetermined size simultaneously.