Patent classifications
H05K2203/0278
Power semiconductor substrates with metal contact layer and method of manufacture thereof
A power semiconductor substrate comprising an insulating planar base, at least one conductor track and at least one contact area as part of the conductor track, wherein a layer of a metallic material is disposed on the contact area by means of pressure sintering. The associated method comprises the steps of: producing a power semiconductor substrate that includes a planar insulating base, conductor tracks and contact areas; arranging a pasty layer, composed of a metallic material and a solvent, on at least one contact area of the power semiconductor substrate; and applying pressure to the pasty layer.
OBJECT STAGE AND HOT PRESSING APPARATUS
An object stage and a hot pressing apparatus are disclosed. The object stage includes a base (1) and a support device (2) fixed on the base (1), wherein the support device (2) includes a plurality of detachable support sub-devices (21): the support device is configured to allow a printed circuit board (3) with at least one protruding structure (4) to be placed thereon, and no support sub-device (21) is disposed at a position on the support device (2) corresponding to the protruding structure (1). The object stage reduces manufacture cost, saves production time and improves production efficiency.
METHOD FOR SOLDERLESS ELECTRICAL PRESS-IN CONTACTING OF ELECTRICALLY CONDUCTIVE PRESS-IN PINS IN CIRCUIT BOARDS
A method is described for solderless electrical press-in contacting of conductive press-in pins in circuit boards, the method comprising the following steps: Providing a circuit board having at least one contacting opening for press-in contacting; providing at least one press-in component having at least one conductive press-in pin; providing a sonotrode for exerting a force and for applying ultrasonic energy. In order to electrically and mechanically contact press-in pins to a circuit board by means of ultrasonic press-in technology, it is provided that the press-in component together with its press-in pin, is fixated during a press-in step, in particular held firmly in place, and that a force and ultrasonic energy are directly applied to the circuit board by means of the sonotrode such that the circuit board is pressed at the location of its contacting opening onto the press-in pin, not directly acted upon by the sonotrode, of the press-in component.
Circuit Board for High Frequency Transmission and Shielding Method
The present disclosure provides a circuit board for high frequency transmission and a shielding method. The circuit board for high frequency transmission includes: a first shielding film, a second shielding film and a circuit board body. The circuit board body includes a first surface and a second surface that are arranged opposite to each other. The first shielding film covers the first surface, and the second shielding film covers the second surface. The circuit board body is provided with a wire region. The first shielding film and the second shielding film are in electrical connection at a lateral side of the wire region. Therefore, leaky waves at the lateral side of the circuit board body are effectively avoided, and the circuit board body is thin in structure.
Method for repairing a fine line
A method for repairing a fine line is provided. Nano metal particles are filled in a defect of a circuit board. The nano metal particles in the defect are irradiated by a laser, or heated, such that the nano metal particles in the defect are metallurgically bonded to an original line of the circuit board. A surface of the circuit board is cleaned to remove residual nano metal particles on parts of the circuit board where metallurgical bonding is not performed, thereby completing line repairing of the circuit board.
THIN CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME
A thin circuit board (100) and a method of manufacturing the same, the thin circuit board (100) includes: a dielectric layer (40); an inner circuit substrate (30); and a metal layer (50) formed on at least one side of the inner circuit substrate (30). The metal layer (450) is covered by the dielectric layer (40). The dielectric layer (40) includes an outermost insulating layer (11) and a bonding structure (20) sandwiched between the inner circuit substrate (30) and the metal layer (50), the metal layer (50) is wrapped by the insulating layer (11) and the bonding structure (20).
Bonding apparatus and method
A bonding apparatus and method includes: a stage configured to fix a first electric component; a pressing unit configured to press a conductive adhesive film and a second electric component onto the first electric component; a driver configured to control movement of the pressing unit along a direction; and a plurality of sensors at different positions on the stage and configured to sense a change in capacitance with the pressing unit, wherein the pressing unit includes a flat metal material in first regions facing the plurality of sensors.
DISPLAY DEVICE
A display device includes: a display panel; an input sensor disposed on the display panel; a flexible circuit board connected to the display panel and the input sensor; a first differential signal line and a second differential signal line, which are disposed on the flexible circuit board and connected to the display panel; and a transmission line and a receiving line, which are disposed on the flexible circuit board and connected to the input sensor. In a plan view, the receiving line is disposed between the first differential signal line and the second differential signal line.
Fluororesin base material, printed wiring board, and circuit module
A fluororesin base material containing a fluororesin as a main component includes a modified layer on at least a partial region of a surface thereof, the modified layer containing a siloxane bond and a hydrophilic organofunctional group, and a surface of the modified layer having a contact angle of 90° or less with pure water.
Apparatus and method for securing substrates with varying coefficients of thermal expansion
An integrated circuit assembly that includes a semiconductor wafer having a first coefficient of thermal expansion; an electronic circuit substrate having a second coefficient of thermal expansion that is different than the first coefficient of thermal expansion; and an elastomeric connector arranged between the semiconductor wafer and the electronic circuit substrate and that forms an operable signal communication path between the semiconductor wafer and the electronic circuit substrate.