H05K2203/0278

Selective dielectric resin application on circuitized core layers

A process of manufacturing a multiple-layer printed circuit board includes selectively applying a dielectric resin to a region of a circuitized core layer. The process also includes partially curing the dielectric resin prior to performing a lamination cycle to form the multiple-layer printed circuit board that includes the circuitized core layer.

Display device and flexible circuit board

A display device and a flexible circuit board are provided. The display device includes: a display panel having a first bonding region, the first bonding region being provided with a plurality of first connection terminals; a touch panel having a second bonding region, the second bonding region being provided with a plurality of second connection terminals; a flexible circuit board having a first surface and a second surface opposite to the first surface; first conductive structures disposed on the first surface of the flexible circuit board and configured to be connected with the plurality of first connection terminals; second conductive structures, disposed on the second surface of the flexible circuit board and configured to be connected with the plurality of second connection terminals.

Systems and methods for surface mounting cable connections

A method and device are provided. The device includes a system component that has a circuit board that includes a cable connection portion. The cable connection portion is disposed on and extends along a mounting surface, and includes board pads disposed on the mounting surface within the cable connection portion. The board pads define corresponding board contact surfaces for electrical coupling with connector pads, and include a board adhesive material disposed on the corresponding board contact surfaces.

METHOD OF MANUFACTURING MULTILAYER SUBSTRATE
20220007519 · 2022-01-06 ·

In a preparatory process of a method of manufacturing a multilayer substrate, an insulating substrate is prepared, with a conductor pattern formed only on one surface of the insulating substrate. At that time, the conductor pattern is constituted of the Cu element, a Ni layer is formed on the surface of the conductor pattern that is on the side of the insulating substrate. In a first forming process, a via hole having the conductor pattern as the bottom thereof is formed in the insulating substrate. At that time, the Ni layer that is in the area of the bottom is removed. In a filling process, a conductive paste is filled in the interior of the via hole. In a second forming process, a stacked body is formed by stacking a plurality of the insulating substrates. In a third forming process, the stacked body is heated while being subjected to pressure.

Resin-clad copper foil, copper-clad laminated plate, and printed wiring board

There is provided a resin-coated copper foil including a resin layer having excellent dielectric characteristics suitable for high frequency applications, exhibiting high interlayer adhesion and heat resistance in the case where the resin layer is used in a copper-clad laminate or printed circuit board. The resin-coated copper foil of the present invention includes a copper foil and a resin layer on at least one side of the copper foil. The resin layer comprises a resin mixture containing an epoxy resin, a polyimide resin, and an aromatic polyamide resin; and an imidazole curing catalyst.

INSULATING RESIN CIRCUIT SUBSTRATE

There is provided an insulating resin circuit substrate including an insulating resin layer and a circuit layer consisting of a plurality of metal pieces disposed to be spaced apart in a circuit pattern shape on one surface of the insulating resin layer, in which in a case where a surface of the insulating resin layer in a gap between the metal pieces is analyzed by SEM-EDX, the area rate of a metal element constituting the metal pieces is less than 2.5%.

Interconnection of printed circuit boards with nanowires
20230319976 · 2023-10-05 ·

A carrier assembly may include a first carrier sub-assembly, said first carrier sub-assembly having an elongated shape and comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said at least one electrically conductive layer structure extending up to a first area provided on one of two extremities of the elongated shape, wherein a first plurality of conductive nanowires is provided on said first area, and a second carrier sub-assembly, said second carrier sub-assembly comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said at least one electrically conductive layer structure comprising a second area, wherein a second plurality of conductive nanowires is provided on that second area.

Process and device for low-temperature pressure sintering

Process for producing an electronic subassembly by low-temperature pressure sintering, comprising the following steps: arranging an electronic component on a circuit carrier having a conductor track, connecting the electronic component to the circuit carrier by the low-temperature pressure sintering of a joining material which connects the electronic component to the circuit carrier, characterized in that, to avoid the oxidation of the electronic component or of the conductor track, the low-temperature pressure sintering is carried out in a low-oxygen atmosphere having a relative oxygen content of 0.005 to 0.3%.

UV fixing glue for assembly

One aspect relates to a method of manufacture of an electronic assembly comprising at least these steps: providing a substrate having at least a first contact area; positioning a spot of a UV curable substance on the substrate; positioning an electrically conductive item on the substrate wherein the electrically conductive item is superimposed on the first contact area and on the spot of curable substance; exposing the UV curable substance to UV irradiation, wherein a mechanical connection between the electrically conductive item and substrate is formed; and optionally connecting the first contact area with the electrically conductive item. One aspect relates to an electronic assembly comprising a substrate with a contact area, a spot of a cured substance on the substrate and an electrically conductive item that is in electrically conductive connection with the first contact area and mechanically connected through the spot of cured substance to the substrate.

METHOD FOR MANUFACTURING JOINED BODY, JOINED BODY, AND HOT-MELT ADHESIVE SHEET
20230287246 · 2023-09-14 · ·

A method for manufacturing a joined body includes subjecting a first electronic component and a second electronic component to thermocompression bonding with a hot-melt adhesive sheet interposed therebetween. The hot-melt adhesive sheet includes a binder and electroconductive particles. The binder includes a crystalline polyamide resin and a crystalline polyester resin. When a melt viscosity of the hot-melt adhesive sheet is measured under a condition of a heating rate of 5° C./min. the hot-melt adhesive sheet has a ratio of a melt viscosity at 20° C. lower than a thermocompression bonding temperature to a melt viscosity at the thermocompression bonding temperature of 10 or higher.