A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.

A method for copper filling-up of blind vias in HDI rigid-flex PCB is provided which includes the steps of: 1) performing a copper reduction on a single side of a double sided copper-clad laminate; 2) drilling blind vias with inverted trapezoidal shape in a side of the double sided copper-clad laminate being copper reduced by laser; 3) cleaning via walls and the via bottoms of the blind vias to remove the residues left during the drilling process; 4) depositing metallic copper layers on surfaces of the via walls and the via bottoms of the blind vias; 5) filling the blind vias with copper after the blind vias being deposited by metallic copper layer. The copper filling-up of the blind vias in the HDI rigid-flex PCB is achieved, leading to decreased cost of equipment investment and improved production efficiency and benefits.

The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.

A resin multilayer substrate includes a first resin layer including a thermoplastic resin as a main material, a second resin layer including the thermoplastic resin as a main material and superposed on the first resin layer, a first interlayer-connection conductor passing through the first resin layer in a thickness direction, and a first conductor pattern at an area including a region in which the first interlayer-connection conductor is exposed at the surface of the first resin layer between the first resin layer and the second resin layer. The first conductor pattern includes a portion in or at which a portion of the first interlayer-connection conductor is disposed. The first conductor pattern includes a first portion covering the region exposed at the surface of the first resin layer; and a second portion disposed surrounding the first portion. The first portion and the second portion have different thicknesses from each other.

A method of manufacturing a laminate electronic device is disclosed. One embodiment provides a carrier, the carrier defining a first main surface and a second main surface opposite to the first main surface. The carrier has a recess pattern formed in the first main surface. A first semiconductor chip is attached on one of the first and second main surface. A first insulating layer overlying the main surface of the carrier on which the first semiconductor chip is attached and the first semiconductor chip is formed. The carrier is then separated into a plurality of parts along the recess pattern.

An instrument panel as a vehicular panel includes a panel body on a surface side of which key tops are installed, a printed wiring section arranged on the surface side of the panel body, and an insulation outer layer arranged on the surface side of the panel body so as to cover the printed wiring section.

A wired circuit board includes an insulating layer and a conductive layer. The insulating layer continuously has a first insulating portion, a second insulating portion having a thickness smaller than that of the first insulating portion, and a third insulating portion disposed between the first insulating portion and the second insulating portion and having a thickness that gradually becomes smaller from the first insulating portion toward the second insulating portion. The conductive layer continuously has a first conductive portion disposed at one-side surface of the first insulating portion and a second conductive portion disposed at one-side surface of the second insulating portion and having a thickness smaller than that of the first conductive portion. The first conductive portion is disposed at one-side surface of the second insulating portion and the third insulating portion or is disposed at one-side surface of the first insulating portion and the third insulating portion.

A method for constructing an external circuit structure is provided. The method is applied to an inner circuit substrate, wherein, the method comprises: laminating a copper foil and a prepreg on the inner circuit substrate; wherein, the prepreg is laminated between the copper foil and the inner circuit substrate; drilling at least one blind via from the copper foil to reach the copper circuit of the inner circuit substrate; removing smear generated in the at least one blind via during the drilling process; corroding off the copper foil; electroless copper plating on the prepreg to form an electroless plating copper layer on the prepreg; wherein, during the electroless copper plating process, a swelling process without desmearing process is implemented.

A wired circuit board includes an insulating layer and a conductive layer. The insulating layer continuously has a first insulating portion, a second insulating portion having a thickness smaller than that of the first insulating portion, and a third insulating portion disposed between the first insulating portion and the second insulating portion and having a thickness that gradually becomes smaller from the first insulating portion toward the second insulating portion. The conductive layer continuously has a first conductive portion disposed at one-side surface of the first insulating portion and a second conductive portion disposed at one-side surface of the second insulating portion and having a thickness smaller than that of the first conductive portion. The first conductive portion is disposed at one-side surface of the second insulating portion and the third insulating portion or is disposed at one-side surface of the first insulating portion and the third insulating portion.

A method for manufacturing a wiring substrate includes forming a second resin insulating layer on a first resin insulating layer such that the second resin insulating layer is in contact with a surface of the first resin insulating layer, irradiating laser upon the second resin insulating layer such that a recess penetrating through the second resin insulating layer and exposing the first resin insulating layer is formed, and forming a conductor layer including conductor material filled in the recess formed through the second resin insulating layer such that the conductor layer is embedded in the second resin insulating layer. The second resin insulating layer are formed on the surface of the first resin insulating layer such that the first resin insulating layer and the second resin insulating layer have different processability with respect to the laser.