The present invention relates to a method for manufacturing a ceramic substrate. Each of upper and lower metal layers respectively bonded to upper and lower surfaces of the ceramic substrate may have a thickness of 0.3 mm to 10 mm, so as to be applicable to a high output power module, and may reduce a chemical etching process time by performing, in advance, a trenching process, which is a mechanical processing scheme, in order to form an electrode pattern on the upper metal layer.

The layered body includes a seed layer that serves as a base for plating and that can be formed using a simple and low-cost method capable of ensuring stable quality and preventing the occurrence of scratches on the plating seed layer due to contact with a coating apparatus during application and contact with conveyor rollers. The layered body can provide good adhesion between a support and a metal layer (metal plating layer) without roughening the surface of the support. The transfer layered bodies is produced by forming a plating seed layer containing a dispersant and an electrically conductive material on a temporary support, forming a resin layer on the plating seed layer, and then allowing functional groups in the plating seed layer and functional groups in the resin layer to react with each other.

A layered body is manufactured by etching a first foil constituting a three-layer metal foil to form a first metal layer shaped like a pattern, stacking a first insulating layer so as to bury the first metal layer, forming a first via as a plated via, forming a second metal layer shaped like a pattern on the first insulating layer, stacking a second insulating layer so as to bury the second metal layer, removing a second foil and a third foil constituting the three-layer metal foil, stacking a third insulating layer and a resin film on the second insulating layer, and providing a second via as a paste via to the second insulating layer, and a multilayer substrate is obtained by stacking a plurality of layered bodies.

A circuit pattern is obtained, capable of being easily applicable to current increase, making short circuit or ion migration between adjacent circuit conductors hard to be generated, and allowing a circuit pattern to be tightly arranged. A circuit pattern comprises a circuit conductor to be layered on a metal substrate through an insulating layer, an intermediate portion in a layer direction having a swelled shape in a layer-crossing direction in a cross section of the circuit conductor, and the swelled shape is formed by a gentle face in the layer direction.

A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed layer and the electrolytic plating layer and connecting the first conductor and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second portion and the third portion, the second portion has a first film and a second film electrically connected to the first film, and a portion of the first film is formed on the second film.

A component carrier including i) a stack having at least one electrically insulating layer structure and at least one electrically conductive layer structure; and ii) a via embedded in the stack, wherein the via has iia) a lower metal-filled part, and iib) an upper metal-filled part, wherein the upper metal-filled part is formed directly on the lower metal-filled part with an interface region in between, and wherein the interface region is substantially free of metal oxides, in particular copper oxides. Further, there is described a manufacture method and a manufacture apparatus with an electron attachment process.