A method for producing an electrically conductive thin film on a substrate is disclosed. Initially, a reducible metal compound and a reducing agent are dispersed in a liquid. The dispersion is then deposited on a substrate as a thin film. The thin film along with the substrate is subsequently exposed to a pulsed electromagnetic emission to chemically react with the reducible metal compound and the reducing agent such that the thin film becomes electrically conductive.

A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra.sup.2/Sm>0.01 m and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 m or more.

A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra.sup.2/Sm>0.01 m and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 m or more.

A method of forming an electronic assembly. The method includes covering a patterned conductive layer that is on a dielectric layer with a solder resist; depositing a metal layer on to the solder resist; depositing a photo resist onto the metal layer; patterning the photo resist; etching the metal layer that is exposed from the photo resist to form a metal mask; removing the photo resist; and plasma etching the solder resist that is exposed from the metal mask. An electronic assembly for securing for an electronic card. The electronic assembly includes a patterned conductive layer that is on a dielectric layer; and a solder resist covering the patterned conductive layer and the dielectric layer, wherein the solder resist includes openings that expose the patterned conductive layer, wherein the openings in the solder resist only have organic material on side walls of the respective openings.

A manufacturing method of a circuit board including the following steps is provided. A carrier substrate is provided. A patterned photoresist layer is formed on the carrier substrate. An adhesive layer is formed on the top surface of the patterned photoresist layer. A dielectric substrate is provided. A circuit pattern and a dielectric layer covering the circuit pattern are formed on the dielectric substrate, wherein the dielectric layer has an opening exposing a portion of the circuit pattern. The adhesive layer is adhered to the dielectric layer in a direction that the adhesive layer faces of the dielectric layer. The carrier substrate is removed. A patterned metal layer is formed on a region exposed by the patterned photoresist layer. The patterned photoresist layer is removed. The adhesive layer is removed.

A manufacturing method of a circuit board and a piezochromic stamp are provided. A circuit pattern is formed on a dielectric substrate. A dielectric layer having a hole or a conductive via and covering the circuit pattern is formed on the dielectric substrate. A conductive seed layer is formed on the dielectric layer. A photoresist layer is formed on the conductive seed layer. A piezochromic stamp is imprinted on the photoresist layer, wherein when the pressing side of the piezochromic stamp is in contact with the conductive seed layer, the light transmittance effect thereof is changed to blocking or allowing light having a specific wavelength to pass through. A patterned photoresist layer is formed by using the piezochromic stamp as a mask. A patterned metal layer is formed on the exposed conductive seed layer. The patterned photoresist layer and the conductive seed layer are removed.

A manufacturing method of a circuit board and a stamp are provided. The method includes: forming a circuit pattern and a dielectric layer on a dielectric substrate; forming a conductive via in the dielectric layer; forming a thermal-sensitive adhesive layer on the dielectric layer; forming a photoresist material layer on the thermal-sensitive adhesive layer; imprinting the photoresist material layer using a stamp, wherein a first conductive layer is disposed on the surface of the pressing side of the stamp, a second conductive layer is disposed on the surface of the other portions; applying a current to the stamp; removing the stamp and the photoresist material layer and the thermal-sensitive adhesive layer below the pressing side to form a patterned photoresist layer and thermal-sensitive adhesive layer; forming a patterned metal layer on the region exposed by the patterned photoresist layer; removing the patterned photoresist layer and thermal-sensitive adhesive layer.

A substrate structure includes a dielectric layer, a metal foil, a patterned metal layer, a first patterned solder-resist layer, a release layer and a second patterned solder-resist layer. The dielectric layer includes a first surface having a plurality of recesses and a second surface. The metal foil is disposed on the second surface. The patterned metal layer is disposed on the first surface, the patterned metal layer has a plurality of openings, and the openings are respectively corresponding to and expose the recesses. The first patterned solder-resist layer is filled in each of the recesses and corresponding to each of the openings. A top surface of the first patterned solder-resist layer is substantially coplanar with a top surface of the patterned metal layer. The second patterned solder-resist layer is disposed on the first patterned solder-resist layer and in the openings, and covers a portion of the patterned metal layer.

A substrate structure includes a dielectric layer, a metal foil, a patterned metal layer, a first patterned solder-resist layer, a release layer and a second patterned solder-resist layer. The dielectric layer includes a first surface having a plurality of recesses and a second surface. The metal foil is disposed on the second surface. The patterned metal layer is disposed on the first surface, the patterned metal layer has a plurality of openings, and the openings are respectively corresponding to and expose the recesses. The first patterned solder-resist layer is filled in each of the recesses and corresponding to each of the openings. A top surface of the first patterned solder-resist layer is substantially coplanar with a top surface of the patterned metal layer. The second patterned solder-resist layer is disposed on the first patterned solder-resist layer and in the openings, and covers a portion of the patterned metal layer.

A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra.sup.2/Sm>0.01 m and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 m or more.