An apparatus for fabricating an electrode structure includes a high voltage unit, a plating material part facing the high voltage unit, and a transfer roll to which a negative voltage is applied. The high voltage unit includes a high voltage roll, and an insulating sheath configured to cover a surface of the high voltage roll. The high voltage roll is applied with a voltage of about 1 kV to about 100 kV, the plating material part is applied with a positive voltage, and the high voltage unit and the transfer roll rotate.

Disclosed is a production method of a multi-layered printed wiring board, including the following steps 1 to 3: Step 1: a step of laminating, on a substrate with inner layer circuit, a metal foil with adhesive layer including a support, a metal foil having a thickness of 3 m or less and or less relative to the thickness of the inner layer circuit, and an organic adhesive layer having a thickness of 10 m or less in this order, via an organic insulating resin layer such that the organic insulating resin layer and the organic adhesive layer are opposed to each other, and then releasing the support to form a laminated sheet (a) having the metal foil as an outer layer metal foil layer; Step 2: a step of irradiating the laminated sheet (a) with a laser to bore the outer layer metal foil layer, the organic adhesive layer, and the organic insulating resin layer to form a bored laminated sheet (b) having a blind via hole; and Step 3: a step of forming an outer layer circuit connected with the inner layer circuit through the following steps 3-1 to 3-4: Step 3-1: a step of etching removing the outer layer metal foil layer of the bored laminated sheet (b) formed in the step 2 and then forming an outer layer copper layer having a thickness of 2 m or less on the bored laminated sheet (b); Step 3-2: a step of forming a resist pattern by a resist applied on the outer layer copper layer; Step 3-3: a step of forming a circuit layer on the surface of the outer layer copper layer on which the resist pattern is not formed, by electrolytic copper plating; and Step 3-4: a step of removing the resist pattern and then removing the exposed outer layer copper layer by etching, thereby forming an outer layer circuit connected with the inner layer circuit.

A piezochromic stamp is provided, wherein when a pressing side of the piezochromic stamp is subjected to a pressure, a light transmittance effect of the pressing side is changed from allowing a light having a specific wavelength to pass through to blocking the light having the specific wavelength, or the light transmittance effect of the pressing side is changed from blocking the light having the specific wavelength to allowing the light having the specific wavelength to pass through.

A method for producing a wired circuit board including an insulating layer and a conductive pattern, including (1), providing the insulating layer having an inclination face; (2), providing a metal thin film at least on the surface of the insulating layer; (3), providing a photoresist on the surface of the metal thin film; (4), disposing a photomask so that a first portion, where the conductive pattern is provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask; (5), removing the first portion to expose the metal thin film corresponding to the first portion; and (6), providing the conductive pattern on the surface of the metal thin film exposed from the photoresist. The inclination face has a second portion that allows the light reflected at the metal thin film to reach the first portion.

The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.

A method for producing a wired circuit board including an insulating layer and a conductive pattern, including (1), providing the insulating layer having an inclination face; (2), providing a metal thin film at least on the surface of the insulating layer; (3), providing a photoresist on the surface of the metal thin film; (4), disposing a photomask so that a first portion, where the conductive pattern is provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask; (5), removing the first portion to expose the metal thin film corresponding to the first portion; and (6), providing the conductive pattern on the surface of the metal thin film exposed from the photoresist. The inclination face has a second portion that allows the light reflected at the metal thin film to reach the first portion.

A method for manufacturing a flexible circuit board is provided. The method for manufacturing a flexible circuit board includes the following steps: providing a carrier substrate, forming a flexible substrate on the carrier substrate, and forming a plurality of circuit strings on the flexible substrate. A flexible circuit board manufactured by the above method is also provided.

The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.

A method includes the following steps: S1, providing the insulating layer having an inclined face; S4, disposing a photomask so that in the photoresist, first and second exposure portions are exposed to light, and exposing the photoresist is to light through the photomask; S5, removing the first and the second exposure portions of the photoresist. On the assumption that in S4, light reflected at the metal thin film is focused between the first and the second exposure portions of the photoresist, the inclined face has a bending portion bending in one direction, the portion removed in S5 in the photoresist due to light focus being continuous with the first and the second exposure portions. The second exposure portion includes continuously an avoidance portion that avoids the bending portion and an overlapping portion that overlaps with at least a portion other than the bending portion in the inclined face.

A manufacturing method of a circuit board and a stamp are provided. The method includes the following steps. A circuit pattern and a dielectric layer covering the circuit pattern are formed on a dielectric substrate. A conductive via connected to the circuit pattern is formed in the dielectric layer. A photoresist material layer is formed on the dielectric layer. An imprinting process is performed on the photoresist material layer using a stamp to form a patterned photoresist layer, wherein the pressing side of the stamp facing the circuit pattern becomes sticky when subjected to pressure so as to catch photoresist residue from the photoresist material layer in the imprinting process. A patterned metal layer is formed on a region exposed by the patterned photoresist layer. The patterned photoresist layer is removed.