A component embedded circuit board includes a printed circuit board, a dielectric layer, and an antenna structure laminated in that order. The printed circuit board includes a first opening and a first circuit layer, and the first circuit layer includes at least one first connecting pad. A second opening is defined in the dielectric layer. A conductive structure is embedded in the dielectric layer. The second opening penetrates the dielectric layer. The antenna structure includes a first ground layer. A component is embedded in the first opening. One end of the conductive structure is connected to the first ground layer, and the other end of the conductive structure is connected to the first connecting pad. The second opening corresponds to the first opening. A gap is generated by the second opening and the component. A method for manufacturing the package circuit structure is also disclosed.

A laminate comprising a substrate; and a plating-forming layer disposed on at least one surface of both surfaces of the substrate and containing a thermoplastic resin and a plating catalyst, wherein the plating-forming layer further satisfies conditions of the following (1) and/or (2),

(1) the plating-forming layer contains a dispersing agent for dispersing the plating catalyst
(2) an abundance of the plating catalyst on a surface side of the plating-forming layer is higher than an abundance of the plating catalyst on the substrate side of the plating-forming layer.

In a preparatory process of a method of manufacturing a multilayer substrate, an insulating substrate is prepared, with a conductor pattern formed only on one surface of the insulating substrate. At that time, the conductor pattern is constituted of the Cu element, a Ni layer is formed on the surface of the conductor pattern that is on the side of the insulating substrate. In a first forming process, a via hole having the conductor pattern as the bottom thereof is formed in the insulating substrate. At that time, the Ni layer that is in the area of the bottom is removed. In a filling process, a conductive paste is filled in the interior of the via hole. In a second forming process, a stacked body is formed by stacking a plurality of the insulating substrates. In a third forming process, the stacked body is heated while being subjected to pressure.

A wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers, a plurality of circuit layers in contact with the dielectric layers, and a plurality of dam portions in contact with the dielectric layers. The dam portions are stacked on and contact one another. The conductive through via extends through the dam portions.

The present invention relates to a prepreg including a fiber base material layer containing a fiber base material, a first resin layer formed on one surface of the fiber base material layer, and a second resin layer formed on the other surface of the fiber base material layer, wherein the first resin layer is a layer obtained through layer formation of a resin composition (I) containing, as a main component of resin components, an epoxy resin (A), and the second resin layer is a layer obtained through layer formation of a resin composition (II) containing, as a main component of resin components, an amine compound (B) having at least two primary amino groups in one molecule thereof and a maleimide compound (C) having at least two N-substituted maleimide groups in one molecule thereof; a laminated sheet obtained by using the prepreg; a printed wiring board; a coreless board; a semiconductor package; and a method of producing a coreless board.

A method includes forming a redistribution structure on a carrier, attaching an integrated passive device on a first side of the redistribution structure, attaching an interconnect structure to the first side of the redistribution structure, the integrated passive device interposed between the redistribution structure and the interconnect structure, depositing an underfill material between the interconnect structure and the redistribution structure, and attaching a semiconductor device on a second side of the redistribution structure that is opposite the first side of the redistribution structure.

A probe card testing device includes a first sub-circuit board, a second sub-circuit board, a connecting structure layer, a fixing plate, a probe head and a plurality of conductive probes. The first sub-circuit board is electrically connected to the second sub-circuit board by the connecting structure layer. The fixing plate is disposed on the second sub-circuit board and includes an opening and an accommodating groove. The opening penetrates the fixing plate and exposes a plurality of pads on the second sub-circuit board. The accommodating groove is located on a side of the fixing plate relatively far away from the second sub-circuit board and communicates with the opening. The probe head is disposed in the accommodating groove of the fixing plate. The conductive probes are set on the probe head and in the opening of the fixing plate. One end of the conductive probes is in contact with the corresponding pads, respectively.

A wiring body includes: a core insulating base material having a first main surface and a second main surface; a signal line and a first power supply line provided on the first main surface; a second power supply line provided on the second main surface and electrically connected to the first power supply line; a first dielectric layer laminated on the first main surface so as to embed the signal line and the first power supply line; a first ground layer provided on the first dielectric layer; a second dielectric layer laminated on the second main surface so as to embed the second power supply line; and a second ground layer provided on the second dielectric layer and sandwiching at least the signal line together with the first ground layer.

A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.

A printed circuit board is provided with multiple electrically conductive layers which are separated from each other by electrically non-conductive layers. At least one electrically conductive outer layer and multiple electrically conductive intermediate layers are provided. At least one electrically conductive through-connection is provided between an electrically conductive outer layer and an electrically conductive intermediate layer. The printed circuit board consists of at least one first multilayer PCB and one second multilayer PCB. The first multilayer PCB is formed from multiple electrically conductive layers and multiple electrically non-conductive layers, and the second multilayer PCB has at least one electrically conductive layer and at least one electrically non-conductive layer. The multilayer PCBs are connected to each other. The electrically conductive through-connection between a first electrically conductive outer layer and a second electrically conductive outer layer is formed from multilayer PCBs.