Patent classifications
H05K2203/0703
Sleeved coaxial printed circuit board vias
A printed circuit board, and a method of fabricating the printed circuit board is disclosed. The printed circuit board includes at least one coaxial via. A hollow via is disposed in the printed circuit board. A metal sleeve is formed around the circumference of said hollow via. An inner conductive path is disposed in the hollow via. Additionally, an insulating material is disposed in the hollow via, between the conducting path and the metal sleeve. The conductive path is used to connect signal traces disposed on two different layers of the printed circuit board. In some embodiments, these signal traces carry signals having a frequency above 1 GHz, although the disclosure is not limited to this embodiment.
Method for ejecting molten metals
In a method for ejecting droplets of a molten metal, the metal is an alloy including a first metal and a second metal. During a jetting operation, the second metal segregates from the first metal. A method of using such alloy is also disclosed herein.
Wiring circuit board and producing method thereof
A wiring circuit board includes a base insulating layer; a first wiring disposed on the base insulating layer; an intermediate insulating layer disposed on the base insulating layer so as to cover the first wiring; a second wiring disposed on the intermediate insulating layer; a single layer first terminal, disposed on the base insulating layer, and electrically connected to the first wiring; and a single layer second terminal, disposed on the base insulating layer, and electrically connected to the second wiring. The first terminal is continuous with the first wiring. The second terminal is discontinuous from the second wiring. The wiring circuit board further includes a connecting portion disposed on the base insulating layer and continuous with the second terminal to electrically connect to the second wiring.
HYBRID DTC EMBEDDING SUBSTRATE
Disclosed are semiconductor modules with hybrid deep trench capacitor (DTC) substrate. The semiconductor modules are hybrid in that they include both ajinomoto build-up film (ABF) and PrePreG (PPG). The ABF avoids or at least mitigates resin void risks. The PPG avoids or at least mitigates delamination and via crack risks.