A miniature technological structure is fabricated by printing a conductive ink in a highly precise pattern onto a substrate. In one embodiment, high-resolution printing of the conductive ink is achieved by precisely patterning a hydrophobic, ink-repellant layer onto a print-receptive surface on the substrate. A water-based, conductive ink is then broadly applied to the substrate, with the ink adhering to the exposed print-receptive surfaces on the substrate and repelling from the ink-repellant layer. In this manner, the ink-repellant layer functions as mask which defines the pattern of the conductive ink retained on the substrate. Because the hydrophobic, ink-repellant layer can be printed with relatively great precision, nanoscale structures can be achieved. In lieu of applying a separate hydrophobic layer onto the substrate, hydrophobicity can be imparted onto an otherwise ink-receptive surface in the desired masking pattern, for example, by roughening the physical texture of the surface.

An article has an electrically-conductive metal-containing pattern and is prepared by: A) providing a metallic pattern on a first substrate; B) applying a darkening agent to the metallic pattern to form a first darkened surface; C) transferring the metallic pattern to a second substrate, leaving an undarkened second surface of the metallic pattern exposed to view; and D) applying a second darkening agent to the undarkened second surface. The first darkened surface formed in B) can have an L* value that is reduced by at least 1 unit compared to an L* value of the metallic pattern provided in A) before application of the darkening agent. Moreover, the second darkened surface formed in D) can have an L* value that is reduced by at least 1 unit compared to an L* value of the undarkened surface of the transferred metallic pattern provided in C).

A component carrier including i) a stack having at least one electrically insulating layer structure and at least one electrically conductive layer structure; and ii) a via embedded in the stack, wherein the via has iia) a lower metal-filled part, and iib) an upper metal-filled part, wherein the upper metal-filled part is formed directly on the lower metal-filled part with an interface region in between, and wherein the interface region is substantially free of metal oxides, in particular copper oxides. Further, there is described a manufacture method and a manufacture apparatus with an electron attachment process.

Substrate assemblies having adhesion promotor layers and related methods are disclosed. An example apparatus includes a substrate, a dielectric layer, a first copper layer between the substrate and the dielectric layer, and a film between the dielectric layer and the first copper layer. The film including silicon and nitrogen and being substantially free of hydrogen. A via in the dielectric layer is to provide access to the first copper layer. A portion of the first copper layer uncovered in the via, a wall of the via and the portion of the first copper layer to be substantially free of fluorine. A seed copper layer positioned on the dielectric layer. The via wall and the portion of the first copper layer. The seed copper layer and the first copper layer define an undercut at an interface between the seed copper layer and the first copper layer.