A method for forming a patterned conductive structure is provided. The method includes forming a soluble layer on a surface of a substrate, wherein the soluble layer has an opening exposing a rough portion of the surface. A first conductive layer is formed on the soluble layer, wherein the first conductive layer extends onto the rough portion in the opening. The soluble layer and the first conductive layer on the soluble layer are removed, wherein a portion of the first conductive layer corresponding to the rough portion is remained on the substrate. A patterned conductive structure formed by the method is also provided.

Disclosed are a printed circuit board and a method of manufacturing the printed circuit board. The printed circuit board includes an insulating layer, and a circuit pattern formed on the insulating layer, wherein the circuit pattern includes a first circuit pattern formed on the insulating layer and including a corner portion of an upper portion which has a predetermined curvature and a second circuit pattern formed on the first circuit pattern and configured to cover an upper surface of the first circuit pattern including the corner portion.

A printed wiring board includes an uppermost insulating layer, first pads positioned to mount an IC chip on the insulating layer, second pads positioned to mount a second printed wiring board on the insulating layer, metal posts formed on the second pads, respectively, such that the metal posts mount the second board over the chip, and a solder resist layer formed on the uppermost insulating layer and having first and second openings such that the first openings exposes the first pads and that the second openings exposes the second pads, respectively. The metal posts are formed such that each of the metal posts has a diameter which is smaller than a diameter of each of the second opening portions, and the second opening portions are formed such that the diameter of each of the second opening portions is smaller than a diameter of each of the second pads.

An interconnect structure for insertion loss reduction in signal transmission and a method thereof are disclosed. In an embodiment, an interconnect is formed on a substrate by chemical etching process, and when the interconnect is protected by photoresist in chemical etching process, the etching direction of etching solution is not oriented, so undercut areas are respectively formed on both sides of a bottom of the interconnect at contact of the interconnect and the substrate because of etching solution residue after the etching process. An included angle formed in the undercut area between the interconnect and the substrate is defined as an etch angle, and a length of the portion, exposing in the undercut area, of the substrate is defined as an etch length. Controlling sizes of the etch angle and the etch length can reduce an insertion loss in signal transmission.

A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

A wiring substrate includes a resin insulating layer, and a conductor layer formed on the resin insulating layer and including a seed layer and a metal film formed on the seed layer such that the conductor layer has wiring patterns including wirings. The conductor layer is formed such that each of the wirings in the wiring patterns has undercut parts on side surfaces extending to the resin insulating layer, and the wirings in the conductor layer include outer wirings formed such that each of the outer wirings has the undercut part on the side surface facing an adjacent one of the wirings is smaller than the undercut part on the side surface farther from the adjacent one of the wirings.