H05K2203/1194

CIRCUIT BOARD AND METHOD FOR MANUFACTURING SAME

Provided are circuit board excellent in interlayer adhesion and solder heat resistance, and production method thereof. The circuit board is produced by a method including: preparing a plurality of at least one kind of thermoplastic liquid crystal polymer (TLCP) films, forming a conductor layer on one side or both sides of a film in at least one of the films to obtain a unit circuit board, laminating the films containing the unit circuit board to obtain a stacked material, conducting thermo-compression-bonding of the stacked material under pressurization to a first temperature giving an interlayer adhesion to integrate the stacked material, carrying out structure-controlling thermal treatment by heating the integrated stacked material at a second temperature which is lower than the first temperature and is lower than a melting point of a TLCP having a lowest melting point out of the plurality of TLCP films.

Flexible printed circuits with bend retention structures

An electronic device may be provided with printed circuits. Electrical components may be interconnected using signal paths formed from metal traces in the printed circuits. The printed circuits may include flexible printed circuits with bent configurations. The flexible printed circuits may be provided with integral bend retention structures. A bend retention structure may be formed from a polymer layer, a solder layer, a stiffener formed from metal or polymer that is attached to flexible printed circuit layers with adhesive, a conformal plastic coating that covers exposed metal traces at a bend, a metal stiffener with screw holes, a shape memory alloy, a portion of a flexible printed circuit dielectric substrate layer with a reduced elongation at yield value, or combinations of these structures. The bend retention structure maintains a bend in a bent flexible printed circuit.

Hermetic metallized via with improved reliability

According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.

Method of forming a metal silicide transparent conductive electrode

A method of forming a metal silicide nanowire network that includes multiple metal silicide nanowires fused together in a disorderly arrangement on a substrate. The metal silicide nanowire network can be formed by applying a solution that contains silicon nanowires onto the substrate, forming a metal layer on the silicon nanowires, and performing a silicidation anneal such that the metal silicide nanowires are fused together in a disorderly arrangement, forming a mesh. After the silicidation anneal is performed, any unreacted silicon or metal can be selectively removed.

Multilayer substrate

A multilayer substrate that includes a first ceramic layer that is a dense body, a second ceramic layer that has open pores, and a resin layer adjacent the second ceramic layer, wherein a material of the resin layer is present in the open pores of the second ceramic layer.

Filtering Cable
20220199292 · 2022-06-23 ·

The present application discloses a filtering cable, which solves the problem that the cable in the related art cannot ensure a simple and reasonable structural design while having good filter performance. One or several core wires and N defective conductor layers surrounding the core wires are sequentially provided from inside to outside in the cross section in the radial direction of the filtering cable; wherein the defective conductor layer has an etching pattern; the etching pattern is distributed in the axial direction of the filtering cable; the etching pattern is used to make the filtering cable equivalent to a preset filter circuit to filter the signal transmitted in the filtering cable.

Hermetic metallized via with improved reliability

An article includes a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and at least one via extending through the substrate from the first major surface to the second major surface over an axial length in an axial dimension. The article also includes a metal connector disposed within the via that hermetically seals the via. The article has a helium hermeticity of less than or equal to 1.0×10.sup.−8 atm-cc/s after 1000 thermal shock cycles, each of the thermal shock cycle comprises cooling the article to a temperature of −40° C. and heating the article to a temperature of 125° C., and the article has a helium hermeticity of less than or equal to 1.0×10.sup.−8 atm-cc/s after 100 hours of HAST at a temperature of 130° C. and a relative humidity of 85%.

Anisotropic Etching Using Photosensitive Compound
20210315104 · 2021-10-07 ·

A method of etching an electrically conductive layer structure during manufacturing a component carrier is provided. The method includes subjecting the electrically conductive layer structure to an etching composition having an etchant and a photosensitive compound to thereby form a recess in the electrically conductive layer structure; while, at least for a part of time, irradiating and/or heating the recess. In addition, an apparatus for etching an electrically conductive layer structure during manufacturing a component carrier, an etched electrically conductive layer structure and a component carrier are provided.

HERMETIC METALLIZED VIA WITH IMPROVED RELIABILITY

According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.

Method of forming a metal silicide transparent conductive electrode

A method of forming a metal silicide nanowire network that includes multiple metal silicide nanowires fused together in an orderly arrangement on a substrate. The metal silicide nanowire network can be formed by printing a first set of multiple parallel silicon nanowires on the substrate and printing a second set of multiple parallel silicon nanowires over the first set of multiple parallel silicon nanowires such that said first set is perpendicular to said second set. A metal layer can be formed on the silicon nanowires. A silicidation anneal process is performed such that metal silicide nanowires are formed and fused together in an orderly arrangement, forming a grid network. After the silicidation anneal is performed, any unreacted silicon or metal can be selectively removed.