This invention introduces an advanced method for manufacturing printed circuit boards (PCBs) featuring an embedded shield, enhancing the integrity and functionality of electronic devices. The process involves forming trenches on the PCB, filling them with solder paste, and seamlessly integrating a shield with a frame through a meticulous soldering procedure. This refined technique offers superior reliability and paves the way for more intricate and robust electronic designs.

A printed circuit board and/or an electronic device including the same are provided. The printed circuit board and/or an electronic device includes at least one insulation layer including a first rigid region and a flexible region extending from the first rigid region, at least one first circuit pattern disposed on one surface of the at least one insulation layer to at least partially transverse the flexible region from the first rigid region, and at least one conductive pad formed at least partially on a surface of the first circuit pattern in the first rigid region, wherein the flexible region may be configured to flexibly deform more than the first rigid region.

A method for fabricating a deformable electronic device includes obtaining a first substrate having a plurality of circuit components, and a second substrate having a plurality of channels and a plurality of holes. The method also includes assembling the first and second substrates to form a stack, in which holes in the plurality of holes of the second substrate are aligned with circuit components in the plurality of circuit components of the first substrates. The method further includes filling the plurality of channels and the plurality of holes with a liquid metal material, thereby producing a plurality of deformable interconnects in the stack. The plurality of deformable interconnects electrically connects the plurality of circuit components to form one or more circuits.

A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed layer and the electrolytic plating layer and connecting the first conductor and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second portion and the third portion, the second portion has a first film and a second film electrically connected to the first film, and a portion of the first film is formed on the second film.