A wiring substrate includes a core substrate. The core substrate includes a first surface, a second surface, and an opening extending through the core substrate between the first and second surfaces. A first conductive film is formed on the first surface and covers the opening. A second conductive film is formed on the second surface. The second conductive film covers the opening. An electronic component is arranged in the opening and connected to the first conductive film. An insulator fills the opening. A first wiring portion includes alternately stacked insulative layers and wiring layers and covers the first surface of the core substrate and the first conductive film. A second wiring portion includes alternately stacked insulative layers and wiring layers, and covers the second surface of the core substrate and the second conductive film.

Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to a second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.

A printing process for printing an ink pattern on a substrate is provided. The ink pattern to be printed is based on an available pattern layout. The pattern layout defines a desired layout of the ink pattern to be printed. Based on the pattern layout an input image for allocating dot positions of the ink pattern is generated. The printing process includes a step of comparing a scan image with the input image to carry out a quality inspection to detect any print defects in the printed ink pattern. The printing process includes a step of providing a decision on an approval or a rejection of the printed ink pattern. In case of an approval, the substrate can be supplied to a subsequent processing station to finalize the substrate. In case of a rejection, the substrate including print defects can be recycled.

A circuit board includes a first substrate, a second substrate, a third substrate, a plurality of conductive structures and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate has an opening and includes a first dielectric layer, a second dielectric layer, and a third dielectric layer. The opening penetrates the first dielectric layer and the second dielectric layer, and the third dielectric layer fully fills the opening. The conductive via structure penetrates the first substrate, the second substrate, the third dielectric layer of the third substrate, and is electrically connected to the first substrate and the third substrate to define a signal path. The first substrate, the second substrate, and the third substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.

The disclosure provides a method for manufacturing a circuit board, which includes: (1) providing a substrate, forming a through hole in the substrate; (2) filling the through hole with a conductor to form a conductive hole; (3) providing a peelable film to cover the substrate; (4) forming a groove by laser, the groove including a concave portion; (5) performing a surface treatment on a wall of the groove; (6) removing the peelable film; (7) forming a seed layer; (8) making a circuit layer to obtain a circuit board unit, the circuit layer including a connection pad, the connection pad shaped as a conductive protrusion which surrounds and is electrically connected to the conductor; (9) repeating step (1) to step (8) at least once; and (10) laminating the circuit board units. The disclosure also provides a circuit board.

A wiring board includes a substrate, wiring, and a reinforcing part. The substrate is stretchable, and includes a first surface and a second surface located opposite to the first surface. The wiring is located at the first surface side of the substrate. The reinforcing part overlaps the wiring when viewed in a direction normal to the first surface of the substrate. The substrate has a control region and a non-control region. The control region overlaps the reinforcing part. The non-control region does not overlap the reinforcing part. The non-control region is positioned to sandwich the control region in a direction orthogonal to the direction in which the wiring extends.

Systems and methods for bonding an electronic component to substrate with a rough surface. The method comprising: disposing an insulating adhesive on the substrate; applying heat and pressure to the insulating adhesive to cause the adhesive to flow into at least one opening formed in the substrate; curing the insulating adhesive to form a pad that is at least partially embedded in the substrate and comprises a planar smooth surface that is exposed; disposing at least one trace on the planar smooth surface of the pad; depositing an anisotropic conductive material on the pad so as to at least cover the at least one trace; placing the electronic component on the pad so that an electrical coupling is formed between the electronic component and the at least one trace; and bonding the electronic component to the substrate by curing the anisotropic conductive material.

A printed circuit board (PCB) core structure is provided for the transition of signals from one side of a PCB to an opposing side of the PCB. The PCB core structure may include a laminated core including an inner core including a plurality of conductive layers (N layers), a first dielectric layer, a first conductive trace disposed over the Nth conductive layer on a first side of the laminated core. The PCB core structure may also include a signal via extending from a first conductive layer to an Nth conductive layer through the laminated core, the signal via configured to connect the first conductive trace to a pin or a second conductive trace on a second side of the laminated core. The PCB core structure may also include a shielding structure surrounding the signal via and partially extending from the first conductive layer to the Nth conductive layer. The PCB core structure may also include a cavity removing a portion of the shielding structure in the Nth conductive layer and filled with a dielectric material. The cavity filled with the dielectric material prevents the first conductive trace from shorting to the shielding structure. The PCB core structure may be fabricated by using a single-lamination cycle.

The object of the invention is to provide a double-sided circuit non-oxide-based ceramic substrate excellent in radiation property and low in cost, and a method for manufacturing the same. A double-sided circuit non-oxide-based ceramic substrate related to the present invention includes a high heat-conductive non-oxide-based ceramic substrate that includes a through hole, a holding layer that is formed on a wall surface of the through hole, and an electro-conductive metal section that is held inside the through hole by the holding layer and does not include an active metal. The double-sided circuit non-oxide-based ceramic substrate related to the present invention preferably includes electrodes (thin film electrodes) that shield end surfaces of the holding layer and end surfaces of the electro-conductive metal section which are exposed to front and back surfaces of the ceramic substrate.

Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to ta second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.