A conductive adhesive and a bonding method of circuit board are provided. The conductive adhesive includes a substrate and an insulating region formed on a surface of the substrate and a conductive region. The insulating region includes a plurality of insulating retaining walls arranged along a same direction and in intervals. The conductive region includes a plurality of conductive adhesive bodies and the conductive adhesive bodies are filled in gaps between the adjacent insulating retaining walls.

A method of fabricating at least one electronic circuit component comprises: patterning a conductive material on a fibrous substrate by aerosol jet printing in a pattern corresponding to said at least one electronic circuit component; and sintering the conductive material by hot air sintering. The fibrous substrate may be paper, for example cellulose fibre paper.

A component carrier with a stack including at least one electrically insulating layer structure and at least one electrically insulating structure has a tapering blind hole formed in the stack and an electrically conductive plating layer extending along at least part of a horizontal surface of the stack outside of the blind hole and along at least part of a surface of the blind hole. A minimum thickness of the plating layer at a bottom of the blind hole is at least 8 μm.

A planar coil element of the present invention includes an insulating base film having a first surface and a second surface opposite to the first surface, a first conductive pattern deposited on the first surface side of the insulating base film, and a first insulating layer covering the first conductive pattern on the first surface side, in which the first conductive pattern includes a core body and a widening layer deposited by plating on the outer surface of the core body, the core body includes a thin conductive layer on the insulating base film, and the ratio of the average thickness of the first conductive pattern to the average circuit pitch of the first conductive pattern is 1/2 or more and 5 or less.

Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment a method includes depositing a first surface finish on one or more electrical routing features located on a first side of a package substrate and on one or more lands located on a second side of the package substrate, the second side being opposite the first side of the substrate. The method may further include removing the first surface finish on the first side of the package substrate; and depositing a second surface finish on the one or more electrical routing features of the first side. The depositing of the second surface finish may be accomplished by one of a Direct Immersion Gold (DIG) process or an Organic Solderability Preservative (OSP) process. Other embodiments may be described and/or claimed.

A method for applying an electrical conductor to an electrically insulating substrate, the method comprising providing a flexible membrane with a pattern of grooves formed on a first surface thereof, and loading the grooves with a composition comprising particles of a conductive material. The composition is, or may be made, electrically conductive. Once the membrane is loaded, the grooved first surface of the membrane is brought into contact with a front or/and back surface of the substrate. A pressure is then applied between the substrate and the membrane(s) so that the composition loaded into the grooves adheres to the substrate. The membrane(s) may remain on the electrically insulating substrate. The electrically conductive particles in the composition can then be sintered to form a pattern of electrical conductors on the substrate, the pattern corresponding to the pattern formed in the membrane(s).

A wiring board includes a conductor pattern formed on a board, and an insulating film that covers at least part of the conductor pattern. A first insulating film is provided in a first region on the board, the first region covering at least part of the conductor pattern and having a first border segment. A second insulating film is provided in a second region on the board, the second region covering at least part of the first region and having a second border segment. The second border segment is located outside the first region, and the shortest distance from any point belonging to the second border segment to the first border segment is not more than 400 μm.

An apparatus is disclosed for transferring a pattern of a composition containing particles of an electrically conductive material and a thermally activated adhesive from a surface of a flexible web to a surface of a substrate. The apparatus comprises: respective drive mechanisms for advancing the web and the substrate to a nip through which the web and the substrate pass at the same time and where a pressure roller acts to press the surfaces of the web and the substrate against one another, a heating station for heating at least one of the web and the substrate prior to, or during, passage through the nip, to a temperature at which the adhesive in the composition is activated, a cooling station for cooling the web after passage through the nip, and a separating device for peeling the web away from the substrate after passage through the cooling station, to leave the pattern of composition adhered to the surface of the substrate.

A method of making a printed circuit board pallet is provided. The method of making the pallet illustratively includes the steps of: providing a base in a form of a polymer sheet stock; applying a fluid onto the base at selective locations where the pallet will be built-up to a three-dimensional form; depositing a polymer powder onto the base at the selective locations applied with the fluid; removing any excess amounts of the polymer powder not adhered to the fluid; and heating the pallet to fuse the polymer powder together and to the base.

A method for exposing a photopolymerization layer comprising photopolymers includes: providing a printed circuit board, with a photopolymerization layer disposed on the top side of the printed circuit board; performing first-instance exposure on the photopolymerization layer, using a UV source and a digital micro-lens device, wherein the UV source is of a power less than 0.2 kW; stopping the first-instance exposure; covering the photopolymerization layer with a mask, with the mask having a bottom side in contact with the photopolymerization layer; and performing second-instance exposure on the photopolymerization layer, using a mercury lamp and the mask, wherein the mercury lamp is of a power greater than 5 kW.