A printed wiring board according to an aspect of the present invention includes an insulating resin, a plated copper formed on a front surface side of the insulating resin, and a plated copper formed on a back surface side of the insulating resin. The plated copper and the plated copper are electrically connected via a plated copper that fills a through hole penetrating the insulating resin from the front surface side to the back surface side. Furthermore, the through hole includes a conical section whose opening diameter decreases from the front surface side to the back surface side of the insulating resin, and a cylindrical section that communicates with the conical section at a bottom surface of the conical section.

A multi-layer printed circuit board (PCB) includes a laminate between a PCB heating core and a PCB signal core. The PCB heating core includes an electrically conductive resistive heating element upon a first core substrate. During a lamination cure PCB fabrication stage, a platen contacts the PCB and a power supply is electrically connected to the resistive heating element. The laminate is cured with heat transferred by the platen and heat from the resistive heating element. The PCB heating core may be located within an inner layer of the multi-layer PCB to normalize a thermal gradient across the multi-layer PCB that may otherwise occur during the laminate cure fabrication stage. As a result of the normalized thermal gradient, the degree of laminate cure and material characteristics of the cured laminate material are more consistent throughout the multi-layer PCB thickness.

Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment a method includes depositing a first surface finish on one or more electrical routing features located on a first side of a package substrate and on one or more lands located on a second side of the package substrate, the second side being opposite the first side of the substrate. The method may further include removing the first surface finish on the first side of the package substrate; and depositing a second surface finish on the one or more electrical routing features of the first side. The depositing of the second surface finish may be accomplished by one of a Direct Immersion Gold (DIG) process or an Organic Solderability Preservative (OSP) process. Other embodiments may be described and/or claimed.

A method for producing a wired circuit board, including an insulating layer having a first through portion passing through in a thickness direction thereof and a first terminal portion having a second through portion overlapped with the first through portion when projected in the thickness direction, includes the steps of providing a first bonding material at one surface in the thickness direction of the first terminal portion and allowing the first bonding material to flow from the one surface in the thickness direction of the first terminal portion toward the other surface in the thickness direction thereof into the second through portion by allowing the first bonding material to flow.

A printed circuit board is provided. The board includes a plurality of vias through the printed circuit board, each having a first section with a first width, a second section with a second width less than the first width, and a third section with a third width greater than the second width and less than the first width. The second section is located between the first section and the third section, the first and second sections are plated, and the third section lacks plating. At least one of the plurality of vias has the first width dimensioned to receive a connector pin inserted through the first face. A further at least one of the plurality of vias has the first width dimensioned to receive a further connector pin inserted through the second face. Further versions of the printed circuit board and method of making a printed circuit board are provided.

The printed circuit board for the memory card includes an insulating layer; a mounting unit formed on a first surface of the insulating layer and electrically connected to a memory device; a terminal unit formed on a second surface of the insulating layer and electrically connected to electronic apparatuses of an outside; and metal layers formed at the mounting unit and the terminal unit and made of the same material.

There is provided a contact structure, comprising a substrate contact including a first contact portion that is located on a leading end side of the substrate contact and that comes into contact with a substrate and a second contact portion that is located nearer to a base end side of the substrate contact than the first contact portion; a seal member configured to cover a periphery of the substrate contact and to have a sealing surface that comes into contact with the substrate to seal the substrate contact; a first pressing portion configured to elastically apply a contact pressure on the substrate to the substrate contact; and a second pressing portion configured to come into contact with the seal member and to apply a contact pressure on the substrate to the seal member independently of the first pressing portion, wherein the first contact portion adheres to the seal member, and the second contact portion is fit in the seal member to be displaceable relative to the seal member.

A method of making a wiring board includes forming a first capacitor carrier layer with a first embedded chip capacitor, a first insulation layer disposed on an upper surface, a second insulation layer disposed on a lower surface, first upper and lower conductive vias in conductive contact with a first electrode, and second upper and lower conductive vias in conductive contact with a second electrode. The method also includes forming a second capacitor carrier layer similar to the first. The method further includes forming a bonded laminate comprising in sequence an upper insulation layer, the first capacitor carrier layer, a center insulation layer, the second capacitor carrier layer, and a lower insulation layer. The method also includes forming a through-hole through the laminate and forming a conductive coating within the through-hole to provide a conductive through-hole. A wiring board also includes the bonded laminate and the embedded capacitors.

Disclosed is an integrated circuit arrangement including a two sided circuit board, having a first surface and a second surface. A plurality of electrical conductors is incorporated as part of the two sided circuit board. An array of through holes extend through the first surface and the second surface, arranged in a pattern and are configured to provide a common electrical connection area, wherein the common electrical connection area is associated with a portion of a particular one of the plurality of electrical conductors.

A printing process for printing an ink pattern on a substrate is provided. The ink pattern to be printed is based on an available pattern layout. The pattern layout defines a desired layout of the ink pattern to be printed. Based on the pattern layout an input image for allocating dot positions of the ink pattern is generated. The printing process includes a step of comparing a scan image with the input image to carry out a quality inspection to detect any print defects in the printed ink pattern. The printing process includes a step of providing a decision on an approval or a rejection of the printed ink pattern. In case of an approval, the substrate can be supplied to a subsequent processing station to finalize the substrate. In case of a rejection, the substrate including print defects can be recycled.