Provided are devices and methods to detect the presence of volatile organic compounds related to the presence of a disease state in a biological sample. The devices may include a detection moiety such as a polynucleoide in electronic communication with a semiconductor such as graphene or a carbon nanotube.

A self-healing field-effect transistor (FET) device is disclosed in this application, the self-healing FET has a self-healing substrate, a self-healing dielectric layer, a gate electrode, at least one source electrode, at least one drain electrode, and at least one channel. The self-healing substrate and the self-healing dielectric layer have a disulfide-containing poly(urea-urethane) (PUU) polymer. The self-healing dielectric layer has a thickness of less than about 10 .Math.m. The electrodes have electrically conductive elongated nanostructures. The at least one channel has semi-conducting elongated nanostructures.

The present disclosure generally relates to compositions and devices for, e.g., hosting qubits, and processes of use. In an embodiment, a quantum device is provided. The quantum device includes a composition, the composition comprising a first component comprising a nanotube and a second component comprising a compound, the compound comprising a metal-bound cyclic tetrapyrrole, an ion thereof, or a combination thereof. In another embodiment, a process for controlling a quantum spin is provided. The process includes cooling a composition described herein to a temperature of about 1 K or more, applying a voltage to the composition, introducing a magnetic field to the composition, and introducing microwave radiation to the composition.

A method for making a strain sensor is provided. The method includes growing an iron (Fe) thin seed layer with patterns on a top surface of a silicon oxide isolation layer formed on a top surface of a silicon wafer; synthesizing a plurality of vertically aligned carbon nanotubes (VACNTs) on top surfaces of the iron (Fe) thin seed layer to form electrodes of the strain sensor;

forming a first polydimethylsiloxane (PDMS) layer disposed on and between adjacent VACNTs of the plurality of VACNTs; peeling the first PDMS layer and the plurality of VACNTs embedded in the first PDMS layer off from the top surface of the silicon oxide isolation layer; and forming a second PDMS layer on a bottom surface of the plurality of VACNTs embedded in the first PDMS layer.

A memory cell includes a first conductive line, a lower electrode, a carbon nano-tube (CNT) layer, a middle electrode, a resistive layer, a top electrode and a second conductive line. The first conductive line is disposed over a substrate. The lower electrode is disposed over the first conductive line. The carbon nano-tube (CNT) layer is disposed over the lower electrode. The middle electrode is disposed over the carbon nano-tube layer, thereby the lower electrode, the carbon nano-tube (CNT) layer and the middle electrode constituting a nanotube memory part. The resistive layer is disposed over the middle electrode. The top electrode is disposed over the resistive layer, thereby the middle electrode, the resistive layer and the top electrode constituting a resistive memory part. The second conductive line is disposed over the top electrode.

A thin film transistor includes a gate electrode, a gate insulating layer, a carbon nanotube structure, a source electrode and a drain electrode. The gate insulating layer is located on the gate electrode. The carbon nanotube structure is located on the gate insulating layer. The source electrode and the drain electrode are arranged at intervals and electrically connected to the carbon nanotube structure respectively. The thin film transistor further includes an interface charge layer, and the interface charge layer is located between the carbon nanotube structure and the gate insulating layer.

Methods of forming films of aligned carbon nanotubes on a substrate surface are provided. The films are deposited from carbon nanotubes that have been concentrated and confined at a two-dimensional liquid/liquid interface. The liquid/liquid interface is formed by a dispersion of organic material-coated carbon nanotubes that flows over the surface of an immiscible liquid within a flow channel. Within the interface, the carbon nanotubes self-organize via liquid crystal phenomena and globally align along the liquid flow direction. By translating the interface across the substrate, large-area, wafer-scale films of aligned carbon nanotubes can be deposited on the surface of the substrate in a continuous and scalable process.

The present disclosure relates to a composition that includes a first layer having a first molecule that includes a metal and a halogen, a second layer that includes the first molecule, and a third layer that includes a chiral molecule, where the third layer is positioned between the first layer and the second layer, and the first layer, the second layer, and the third layer form a crystalline structure.

A memory device includes a bottom electrode, an insulating layer, and a top electrode. The bottom electrode includes a plurality of carbon nanotubes. The insulating layer is disposed over the plurality of carbon nanotubes. The top electrode includes a graphene layer separated from the plurality of carbon nanotubes by the insulating layer.

The present disclosure is drawn to displays for electronic devices. In one example, the display includes a light emitting layer with an organic light emitting element. A porous substrate can be attached to the light emitting layer, wherein the porous substrate is flexible and spreads heat generated by the light emitting layer. A cover layer can be attached to a surface of the porous substrate opposite the light emitting layer.