Patent classifications
H10N30/02
Method of manufacturing a multi-layer PZT microactuator using wafer-level processing
A multi-level piezoelectric actuator is manufactured using wafer level processing. Two PZT wafers are formed and separately metallized for electrodes. The metallization on the second wafer is patterned, and holes that will become electrical vias are formed in the second wafer. The wafers are then stacked and sintered, then the devices are poled as a group and then singulated to form nearly complete individual PZT actuators. Conductive epoxy is added into the holes at the product placement step in order to both adhere the actuator within its environment and to complete the electrical via thus completing the device. Alternatively: the first wafer is metallized; then the second wafer having holes therethrough but no metallization is stacked and sintered to the first wafer; and patterned metallization is applied to the second wafer to both form electrodes and to complete the vias. The devices are then poled as a group, and singulated.
Package structure and method for manufacturing the same
A semiconductor package structure includes a plurality of transducer devices, a cap structure, at least one redistribution layer (RDL) and a protection material. The transducer devices are disposed side by side. Each of the transducer devices has at least one transducing region, and includes a die body and at least one transducing element. The die body has a first surface and a second surface opposite to the first surface. The transducing region is disposed adjacent to the first surface of the die body. The transducing element is disposed adjacent to the first surface of the die body and within the transducing region. The cap structure covers the transducing region of the transducer device to form an enclosed space. The redistribution layer (RDL) electrically connects the transducer devices. The protection material covers the transducer devices.
BARRIER LAYER ON A PIEZOELECTRIC-DEVICE PAD
Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip in which a pad barrier layer caps a pad of a piezoelectric device. The pad barrier layer is configured to block hydrogen ions and/or other errant materials from diffusing to the piezoelectric layer. Absent the pad barrier layer, hydrogen ions from hydrogen-ion containing processes performed after forming the pad may diffuse to the piezoelectric layer along a via extending from the pad to the piezoelectric device. By blocking diffusion of hydrogen ions and/or other errant materials to the piezoelectric device, the pad barrier layer may prevent delamination and breakdown of the piezoelectric layer. Hence, the pad barrier layer may prevent failure of the piezoelectric device.
VIBRATION MODULE AND METHOD FOR MANUFACTURING THE SAME
A vibration module is disclosed. The vibration module includes a film, a piezoelectricity device, and a substrate. The film has a first surface. The piezoelectricity device is disposed on the first surface. The substrate is disposed on the first surface by in-mold injection method, which contacts and surrounds the piezoelectricity device.
Method For Manufacturing Vibration Device
A method for manufacturing a vibration device includes preparing a base wafer including a plurality of fragmentation regions, placing vibration elements at a first surface of the base wafer, producing a device wafer in which a housing that accommodates each of the vibration elements is formed in each of the fragmentation regions by bonding a lid wafer to the base wafer, forming a first groove, which starts from the lid wafer and reaches a level shifted from the portion where the base wafer and the lid wafer are bonded to each other toward a second surface of the base wafer, along the boundary between adjacent fragmentation regions of the device wafer, placing a resin material in the first groove, and forming a second groove, which passes through the device wafer, along the boundary to fragment the device wafer.
PIEZOELECTRIC DEVICE AND METHOD OF FORMING THE SAME
A piezoelectric device including a substrate, a metal-insulator-metal element, a hydrogen blocking layer, a passivation layer, a first contact terminal and a second contact terminal is provided. The metal-insulator-metal element is disposed on the substrate. The hydrogen blocking layer is disposed on the metal-insulator-metal element. The passivation layer covers the hydrogen blocking layer and the metal-insulator-metal element. The first contact terminal is electrically connected to the metal-insulator-metal element. The second contact terminal is electrically connected to the metal-insulator-metal element.
Planarization method
The invention provides a planarization method, which can make the local flatness of the product to be processed more uniform. The product has a cavity filled with oxide and includes a first electrode layer, a piezoelectric layer and a second electrode layer superposed on the cavity. The first electrode layer covers the cavity and includes a first inclined face around the first electrode layer, and the piezoelectric layer covers the first electrode layer and is arranged on the first electrode layer. The planarization method includes: depositing a passivation layer on the second electrode layer and etching the passivation layer completely until the thickness of the passivation layer is reduced to the required thickness.
Piezoelectric rotary optical mount
A piezoelectric rotary optical mount including a clamp including a first hole to hold a hollow member, wherein a contact between the clamp and the hollow member generates a coefficient of friction; a bias element adjacent to the first hole to apply a force to control rotational movement of the hollow member by adjusting the coefficient of friction; and a piezoelectric element to actuate the bias element to apply the force. The clamp may include a housing body including a first end and a second end, wherein the first hole extends in a first axis through the housing body to accommodate the hollow member; a pair of elongated cutout regions extending from the first hole towards the second end to define the bias element; and a second hole adjacent to at least one of the cutout regions to accommodate the piezoelectric element.
ENERGY CONVERSION APPARATUS, PREPARATION METHOD THEREFOR AND USE THEREOF
The present application relates to an energy conversion apparatus. The energy conversion apparatus comprises: an upper conductive layer; a lower conductive layer, which is arranged below the upper conductive layer; and at least one piezoelectric micro/nano unit and a fluid, which are arranged between the upper conductive layer and the lower conductive layer, wherein the piezoelectric micro/nano unit has a piezoelectric property and is immersed in the fluid. The present application further relates to a preparation method for an energy conversion apparatus and the use thereof.
ENERGY CONVERSION APPARATUS, PREPARATION METHOD THEREFOR AND USE THEREOF
The present application relates to an energy conversion apparatus. The energy conversion apparatus comprises: an upper conductive layer; a lower conductive layer, which is arranged below the upper conductive layer; and at least one piezoelectric micro/nano unit and a fluid, which are arranged between the upper conductive layer and the lower conductive layer, wherein the piezoelectric micro/nano unit has a piezoelectric property and is immersed in the fluid. The present application further relates to a preparation method for an energy conversion apparatus and the use thereof.