A multi-level piezoelectric actuator is manufactured using wafer level processing. Two PZT wafers are formed and separately metallized for electrodes. The metallization on the second wafer is patterned, and holes that will become electrical vias are formed in the second wafer. The wafers are then stacked and sintered, then the devices are poled as a group and then singulated to form nearly complete individual PZT actuators. Conductive epoxy is added into the holes at the product placement step in order to both adhere the actuator within its environment and to complete the electrical via thus completing the device. Alternatively: the first wafer is metallized; then the second wafer having holes therethrough but no metallization is stacked and sintered to the first wafer; and patterned metallization is applied to the second wafer to both form electrodes and to complete the vias. The devices are then poled as a group, and singulated.

In some embodiments, a piezoelectric biosensor is provided. The piezoelectric biosensor includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A sensing reservoir is disposed over the piezoelectric structure and exposed to an ambient environment, where the sensing reservoir is configured to collect a fluid comprising a number of bio-entities.

Multiple degenerately-doped silicon layers are implemented within resonant structures to control multiple orders of temperature coefficients of frequency.

In a chip-on-array approach, acoustic and electronic modules are separately formed. The acoustic stack is connected to one interposer, and the electronics are connected to another interposer. Different connection processes (e.g., using low temperature bonding for the acoustic stack and higher temperature-based interconnect for the electronics) may be used. This arrangement may allow for different pitches of the transducer elements and the I/O of the electronics by staggering vias in the interposers. The two interposers are then connected to form the chip-on-array.

An object of the present invention is to provide a piezoelectric element capable of improving the sound pressure particularly in a high frequency band by decreasing the impedance in a case of being used as an electroacoustic transducer or the like, and a piezoelectric speaker formed of a piezoelectric film. The object can be achieved by using a piezoelectric film in which a piezoelectric layer containing piezoelectric particles in a polymer matrix is sandwiched between electrode layers, a planar shape is a polygon, the piezoelectric film has a protruding portion protruding from a side of a polygon other that a shortest side, and the protruding portion is provided with connecting portions for connecting an external power supply and an electrode layer or identical connecting portions are provided in the vicinity of end portions on a side other than the shortest side.

An ultrasonic transducer device for use in an acoustic biometric imaging system, the ultrasonic transducer device comprising: a first piezoelectric element having a first face, a second face opposite the first face, and side edges extending between the first face and the second face; a first transducer electrode on the first face of the first piezoelectric element; a second transducer electrode on the second face of the first piezoelectric element; and a spacer structure leaving at least a portion of the first transducer electrode of the first piezoelectric element uncovered.

A method for manufacturing a vibration device includes preparing a base wafer including a plurality of fragmentation regions, placing vibration elements at a first surface of the base wafer, producing a device wafer in which a housing that accommodates each of the vibration elements is formed in each of the fragmentation regions by bonding a lid wafer to the base wafer, forming a first groove, which starts from the lid wafer and reaches a level shifted from the portion where the base wafer and the lid wafer are bonded to each other toward a second surface of the base wafer, along the boundary between adjacent fragmentation regions of the device wafer, placing a resin material in the first groove, and forming a second groove, which passes through the device wafer, along the boundary to fragment the device wafer.

A layered portion includes, at least above an opening, a first single-crystal piezoelectric body layer, a second single-crystal piezoelectric body layer, an intermediate electrode layer, a lower electrode layer, and an upper electrode layer. The first single-crystal piezoelectric body layer includes a material that produces a difference in etching rate between a positive side and a negative side of a polarization charge. The polarization charge of the first single-crystal piezoelectric body layer is positive on a side of the intermediate electrode layer and negative on a side of the lower electrode layer

A metal stack for templating the growth of AlN and ScAlN films is disclosed. The metal stack comprises one, two, or three layers of metal, each of which is compatible with CMOS post-processing. The metal stack provides a template that promotes the growth of highly textured c-axis {002} AlN and ScAlN films. The metal stacks include one or more metal layers with each metal layer having either a hexagonal {002} orientation or a cubic {111} orientation. If the metal stack includes two or more metal layers, the layers can alternate between hexagonal {002} and cubic {111} orientations. The use of ScAlN results in a higher piezoelectric constant compared to that of AlN for ScAlN alloys up to approximately 44% Sc. The disclosed metal stacks resulted in ScAlN films having XRD FWHM values of less than approximately 1.1° while significantly reducing the formation of secondary grains in the ScAlN films.

In a chip-on-array approach, acoustic and electronic modules are separately formed. The acoustic stack is connected to one interposer, and the electronics are connected to another interposer. Different connection processes (e.g., using low temperature bonding for the acoustic stack and higher temperature-based interconnect for the electronics) may be used. This arrangement may allow for different pitches of the transducer elements and the I/O of the electronics by staggering vias in the interposers. The two interposers are then connected to form the chip-on-array.