Patent classifications
H10N50/85
Memory device comprising a top via electrode and methods of making such a memory device
An illustrative device disclosed herein includes at least one layer of insulating material, a conductive contact structure having a conductive line portion and a conductive via portion and a memory cell positioned in a first opening in the at least one layer of insulating material. In this illustrative example, the memory cell includes a bottom electrode, a memory state material positioned above the bottom electrode and an internal sidewall spacer positioned within the first opening and above at least a portion of the memory state material, wherein the internal sidewall spacer defines a spacer opening and wherein the conductive via portion is positioned within the spacer opening and above a portion of the memory state material.
MULTIFERROIC MEMORY WITH PIEZOELECTRIC LAYERS AND RELATED METHODS
An electronic device may include a first electrode, a first piezoelectric layer electrically coupled to the first electrode, a first magnetostrictive layer above the first piezoelectric layer, a first tunnel barrier layer above the first magnetostrictive layer, and a ferromagnetic layer above the first ferroelectric layer. The electronic device may further include a second electrode electrically coupled to the ferromagnetic layer a second tunnel barrier layer above the ferromagnetic layer, a second magnetostrictive layer above the second tunnel barrier layer, a second piezoelectric layer above the second magnetostrictive layer, and a third electrode electrically coupled to the second piezoelectric layer. The first piezoelectric layer may be strained responsive to voltage applied across the first and second electrodes, and the second piezoelectric layer may be strained responsive to voltage applied across the second and third electrodes.
MULTIFERROIC MEMORY WITH PIEZOELECTRIC LAYERS AND RELATED METHODS
An electronic device may include a first electrode, a first piezoelectric layer electrically coupled to the first electrode, a first magnetostrictive layer above the first piezoelectric layer, a first tunnel barrier layer above the first magnetostrictive layer, and a ferromagnetic layer above the first ferroelectric layer. The electronic device may further include a second electrode electrically coupled to the ferromagnetic layer a second tunnel barrier layer above the ferromagnetic layer, a second magnetostrictive layer above the second tunnel barrier layer, a second piezoelectric layer above the second magnetostrictive layer, and a third electrode electrically coupled to the second piezoelectric layer. The first piezoelectric layer may be strained responsive to voltage applied across the first and second electrodes, and the second piezoelectric layer may be strained responsive to voltage applied across the second and third electrodes.
MAGNETIC TUNNEL JUNCTION ELEMENT AND METHOD FOR MANUFACTURING THE SAME
A magnetic tunnel junction (MTJ) element includes a reference layer, a tunnel barrier layer, a free layer, and a dusting layer. The reference layer has a fixed magnetic orientation. The tunnel barrier layer is disposed on the reference layer, and includes an insulating material. The free layer has a changeable magnetic orientation, and includes a first surface and a second surface. The second surface is disposed to confront the tunnel barrier layer and opposite to the first surface. The dusting layer is formed on one of the first and second surfaces of the free layer, and includes a non-magnetic metal. Another aspect of the MTJ element, and a method for manufacturing the MTJ element are also disclosed.
MULTI-LEVEL MULTIFERROIC MEMORY DEVICE AND RELATED METHODS
An electronic device may include a first electrode, a first magnetostrictive layer coupled to the first electrode, a plurality of alternating ferromagnetic and insulating layers stacked above the first magnetostrictive layer, a second electrode electrically coupled to an intermediate ferromagnetic layer in the stack of ferromagnetic and insulating layers, a second magnetostrictive layer above the stack of ferromagnetic and insulating layers, and a third electrode electrically coupled to the second magnetostrictive layer. At least one ferromagnetic layer below the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and at least one ferromagnetic layer above the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.
MULTI-LEVEL MULTIFERROIC MEMORY DEVICE AND RELATED METHODS
An electronic device may include a first electrode, a first magnetostrictive layer coupled to the first electrode, a plurality of alternating ferromagnetic and insulating layers stacked above the first magnetostrictive layer, a second electrode electrically coupled to an intermediate ferromagnetic layer in the stack of ferromagnetic and insulating layers, a second magnetostrictive layer above the stack of ferromagnetic and insulating layers, and a third electrode electrically coupled to the second magnetostrictive layer. At least one ferromagnetic layer below the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and at least one ferromagnetic layer above the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.
MULTIFERROIC TUNNEL JUNCTION MEMORY DEVICE AND RELATED METHODS
An electronic device may include a first electrode, a first magnetostrictive layer electrically coupled to the first electrode, a first ferroelectric layer above the first ferromagnetic layer, and a ferromagnetic layer above the first ferroelectric layer. The electronic device may further include a second electrode electrically coupled to the ferromagnetic layer, a second ferroelectric layer above the ferromagnetic layer, a second magnetostrictive layer above the second ferroelectric layer, and a third electrode electrically coupled to the second magnetostrictive layer. The first ferroelectric layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and the second ferroelectric layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.
MULTIFERROIC TUNNEL JUNCTION MEMORY DEVICE AND RELATED METHODS
An electronic device may include a first electrode, a first magnetostrictive layer electrically coupled to the first electrode, a first ferroelectric layer above the first ferromagnetic layer, and a ferromagnetic layer above the first ferroelectric layer. The electronic device may further include a second electrode electrically coupled to the ferromagnetic layer, a second ferroelectric layer above the ferromagnetic layer, a second magnetostrictive layer above the second ferroelectric layer, and a third electrode electrically coupled to the second magnetostrictive layer. The first ferroelectric layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and the second ferroelectric layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.
MAGNETIC LAMINATED FILM, MAGNETIC MEMORY ELEMENT, MAGNETIC MEMORY, AND ARTIFICIAL INTELLIGENCE SYSTEM
A magnetic multilayer film for a magnetic memory element includes an amorphous heavy metal layer having a multilayer structure in which a plurality of first layers containing Hf alternate repeatedly with a plurality of second layers containing a heavy metal excluding Hf; and a recording layer that includes a ferromagnetic layer and that is adjacent to the heavy metal layer, the ferromagnetic layer having a variable magnetization direction.
MEMORY DEVICE AND FORMATION METHOD THEREOF
A memory device includes a spin-orbit-transfer (SOT) bottom electrode, an SOT ferromagnetic free layer, a first tunnel barrier layer, a spin-transfer-torque (STT) ferromagnetic free layer, a second tunnel barrier layer and a reference layer. The SOT ferromagnetic free layer is over the SOT bottom electrode. The SOT ferromagnetic free layer has a magnetic orientation switchable by the SOT bottom electrode using a spin Hall effect or Rashba effect. The first tunnel barrier layer is over the SOT ferromagnetic free layer. The STT ferromagnetic free layer is over the first tunnel barrier layer and has a magnetic orientation switchable using an STT effect. The second tunnel barrier layer is over the STT ferromagnetic free layer. The second tunnel barrier layer has a thickness different from a thickness of the first tunnel barrier layer. The reference layer is over the second tunnel barrier layer and has a fixed magnetic orientation.