H10N60/0128

FLEXIBLE WIRING FOR LOW TEMPERATURE APPLICATIONS
20210028346 · 2021-01-28 ·

The subject matter of the present disclosure may be embodied in devices, such as flexible wiring, that include: an elongated flexible substrate; multiple electrically conductive traces arranged in an array on a first side of the elongated flexible substrate; and an electromagnetic shielding layer on a second side of the elongated flexible substrate, the second side being opposite the first side, in which the elongated flexible substrate includes a fold region between a first electronically conductive trace and a second electrically conductive trace such that the electromagnetic shielding layer provides electromagnetic shielding between the first electronically conductive trace and the second electrically conductive trace.

Diffusion barriers for metallic superconducting wires
10902978 · 2021-01-26 · ·

In various embodiments, superconducting wires incorporate diffusion barriers composed of Nb alloys or NbTa alloys that resist internal diffusion and provide superior mechanical strength to the wires.

DIFFUSION BARRIERS FOR METALLIC SUPERCONDUCTING WIRES
20210020334 · 2021-01-21 ·

In various embodiments, superconducting wires incorporate diffusion barriers composed of Ta alloys that resist internal diffusion and provide superior mechanical strength to the wires.

METHOD OF MANUFACTURING INSULATED CONDUCTOR WIRE MATERIAL

A method of manufacturing an insulated conductor wire material having a flat surface (12) with a groove (11, 51) formed on the flat surface (13) and coated with an insulating film, comprising: an electrodeposition step of dipping the conductor wire material in an electrodeposition dispersion (62) and forming an insulating layer (13) on a surface of the conductor wire material; an electrodeposition dispersion removal step of removing the electrodeposition dispersion (62) on the insulating layer (13) by taking out the conductor wire material from the electrodeposition dispersion (62) and by blowing a gas on a side of the flat surface (62) with the groove (11, 51); a baking step of coating the conductor wire material with an insulating film by heating the conductor wire material with the insulating layer (13) formed thereon and by baking the insulating layer (13) onto the conductor wire material.

FABRICATION OF REINFORCED SUPERCONDUCTING WIRES
20200365295 · 2020-11-19 ·

In various embodiments, superconducting wires feature assemblies of clad composite filaments and/or stabilized composite filaments embedded within a wire matrix. The wires may include one or more stabilizing elements for improved mechanical properties.

Strand critical current density in Nb.SUB.3.Sn superconducting strands via a novel heat treatment

A new heat treatment for Internal-Tin Nb.sub.3Sn strands is described. The heat treatment uses Nausite membranes to decrease the volume fraction of the phase and therefore minimize its liquefactionultimately resulting in better connected Nb.sub.3Sn. The heat treatment requires only one stage aside from the final Nb.sub.3Sn reaction stage. This heat treatment enables an increase in critical current density (at 16 T) of 28%.

SUPERCONDUCTIVITY STABILIZING MATERIAL, SUPERCONDUCTING WIRE AND SUPERCONDUCTING COIL

A superconductivity stabilizing material used for a superconducting wire and which is formed of a copper material containing at least one of additive elements selected from Ca, Sr, Ba, and rare earth elements in a range of 3 ppm by mass or more and 100 ppm by mass or less in total, with a remainder being Cu and unavoidable impurities, in which the total concentration of the unavoidable impurities, excluding O, H, C, N, and S which are gas components, is 5 ppm by mass or more and 100 ppm by mass or less, the half-softening temperature thereof is 200 C. or lower, the Vickers hardness thereof is 55 Hv or more, and the residual resistance ratio (RRR) thereof is 50 or more and 500 or less.

Buffer layer to prevent etching by photoresist developer
10811276 · 2020-10-20 · ·

A method includes: providing a device having a first layer and a second layer in contact with a surface of the first layer, in which the second layer includes a first superconductor material; forming a buffer material on the second layer to form an etch buffer layer, in which an etch rate selectivity of the buffer material relative to the second layer upon exposure to a photoresist developer is such that the underlying second layer is not etched during exposure of the buffer layer to the photoresist developer; depositing and removing a selected portion of a resist layer to uncover a first portion of the etch buffer layer, wherein removing the selected portion of the resist layer comprises applying the photoresist developer to the selected portion of the resist layer.

SUPERCONDUCTOR GROUND PLANE PATTERNING GEOMETRIES THAT ATTRACT MAGNETIC FLUX

Superconducting integrated circuit layouts are proofed against the detrimental effects of stray flux by designing and fabricating them to have one or more ground planes patterned in the x-y plane with a regular grid of low-aspect-ratio flux-trapping voids. The ground plane(s) can be globally patterned with such voids and thousands or more superconducting circuit devices and wires can thereafter be laid out so as not to intersect or come so close to the voids that the trapped flux would induce supercurrents in them, thus preventing undesirable coupling of flux into circuit elements. Sandwiching a wire layer between patterned ground planes permits wires to be laid out even closer to the voids. Voids of successively smaller maximum dimension can be concentrically stacked in pyramidal fashion in multiple ground plane layers having different superconductor transition temperatures, increasing the x-y area available for device placement and wire-up.

Diffusion barriers for metallic superconducting wires
10741309 · 2020-08-11 · ·

In various embodiments, superconducting wires incorporate diffusion barriers composed of Ta alloys that resist internal diffusion and provide superior mechanical strength to the wires.