On a first superconducting layer deposited on a first surface of a substrate, a first component of a resonator is pattered. On a second superconducting layer deposited on a second surface of the substrate, a second component of the resonator is patterned. The first surface and the second surface are disposed relative to each other in a non-co-planar disposition. In the substrate, a recess is created, the recess extending from the first superconducting layer to the second superconducting layer. On an inner surface of the recess, a third superconducting layer is deposited, the third superconducting layer forming a superconducting path between the first superconducting layer and the second superconducting layer. Excess material of the third superconducting layer is removed from the first surface and the second surface, forming a completed through-silicon via (TSV).

A superconducting nanowire single photon detector (SNSPD) device includes a substrate, a distributed Bragg reflector on the substrate, a seed layer of a metal nitride on the distributed Bragg reflector, and a superconductive wire on the seed layer. The distributed Bragg reflector includes a plurality of bi-layers, each bi-layer including lower layer of a first material and an upper layer of a second material having a higher index of refraction than the first material. The wire is a metal nitride different from the metal nitride of the seed material.

A superconducting nanowire single photon detector (SNSPD) device includes a substrate having a top surface, an optical waveguide on the top surface of the substrate to receive light propagating substantially parallel to the top surface of the substrate, a seed layer of metal nitride on the optical waveguide, and a superconductive wire on the seed layer. The superconductive wire is a metal nitride different from the metal nitride of the seed layer and is optically coupled to the optical waveguide.

The present disclosure provides a method for making a single photon detector with a modified superconducting nanowire. The method includes: preparing a substrate; modifying a superconducting nanowire with stress on a surface of the substrate; and fabricating a superconducting nanowire single photon detector based on the superconducting nanowire with stress. Based on the above technical solution, in the superconducting nanowire single photon detector provided by the present disclosure, the device material layer film has a certain thickness, the critical temperature of the device material can be reduced, the uniformity of the device material and small superconducting transition width are ensured, thereby improving the detection efficiency of the device.

A hybrid template assisted selective epitaxy (HTASE) process is described comprising the steps of: depositing a template oxide layer on top of a silicon fin; opening a via in a selected portion of the template oxide to expose a portion of the encapsulated silicon fin and subsequently growing a nitride superconductor layer on top of the exposed silicon fin thereby forming a hybrid encapsulation of the silicon fin; performing a back-etch of the silicon fin to remove a portion (e.g., 5 nm-20 um) of the silicon fin; growing a layer formed from a group III/group V compound within an area where the silicon fin was removed via the back-etch; and if needed, removing the template oxide layer.

A titanium (Ti) seed layer is formed from a Ti source directly on a surface of a substrate, where the surface is substantially free of oxide and nitride, and a reactive nitrogen species is introduced from a nitrogen plasma source and additional Ti is introduced from the Ti source, wherein the nitrogen plasma: (a) reacts with the Ti seed layer to form TiN and (b) reacts with the additional Ti to form additional TiN. The TiN and additional TiN collectively form a TiN superconducting layer that directly contacts the surface of the substrate.

A superconductor device according to some embodiments comprises a superconductor stack, which includes a superconductor layer and a silicon cap layer over the superconductor layer, the cap layer including amorphous silicon. The superconductor device further comprises a metal contact over a portion of the silicon cap layer and electrically-coupled to the superconductor layer. The metal contact comprises a core including a first metal, and an outer layer around the core that includes a second metal. The portion of the silicon cap layer is converted from silicon to a conductive compound including the second metal to provide low-resistance electrical coupling between the superconductor layer and the metal contact. The superconductor device further comprises a waveguide, and the first portion of the cap layer under the metal contact is at a sufficient lateral distance from the waveguide to prevent optical coupling between the metal contact and the waveguide.

A hybrid template assisted selective epitaxy (HTASE) process is described comprising the steps of: depositing a template oxide layer on top of a silicon fin; opening a via in a selected portion of the template oxide to expose a portion of the encapsulated silicon fin and subsequently growing a nitride superconductor layer on top of the exposed silicon fin thereby forming a hybrid encapsulation of the silicon fin; performing a back-etch of the silicon fin to remove a portion (e.g., 5 nm-20 um) of the silicon fin; growing a layer formed from a group III/group V compound within an area where the silicon fin was removed via the back-etch; and if needed, removing the template oxide layer.

A quantum computing device includes a first chip having a first substrate and one or more qubits disposed on the first substrate. Each of the one or more qubits has an associated resonance frequency. The quantum computing device further includes a second chip having a second substrate and at least one conductive surface disposed on the second substrate opposite the one or more qubits. The at least one conductive surface has at least one dimension configured to adjust the resonance frequency associated with at least one of the one or more qubits to a determined frequency adjustment value.

A quantum computing device includes a first chip having a first substrate and one or more qubits disposed on the first substrate. Each of the one or more qubits has an associated resonance frequency. The quantum computing device further includes a second chip having a second substrate and at least one conductive surface disposed on the second substrate opposite the one or more qubits. The at least one conductive surface has at least one dimension configured to adjust the resonance frequency associated with at least one of the one or more qubits to a determined frequency adjustment value.