H10N60/82

NONLINEAR MICROWAVE FILTER
20220021372 · 2022-01-20 ·

This nonlinear microwave filter is provided with quantum bits that are formed on a circuit board in which target quantum bits are formed which are quantum bits controlled in a superconducting quantum circuit, and that are coupled to a control waveguide to which the target quantum bits are coupled, wherein the distance to a waveguide end in the control waveguide is within a predetermined range from semi integer times the resonant wavelength, the quantum bits have a resonant frequency in which the difference from the resonant frequency of the target quantum bits is within a predetermined range, and the coupling to the control waveguide is stronger by a predetermined value than the coupling between the target quantum bits and the control waveguide.

Gradiometric parallel superconducting quantum interface device

Techniques regarding parallel gradiometric SQUIDs and the manufacturing thereof are provided. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a first pattern of superconducting material located on a substrate. Also, the apparatus can comprise a second pattern of superconducting material that can extend across the first pattern of superconducting material at a position. Further, the apparatus can comprise a Josephson junction located at the position, which can comprise an insulating barrier that can connect the first pattern of superconductor material and the second pattern of superconductor material.

GRAPHITIC ROOM-TEMPERATURE SUPERCONDUCTOR
20230284539 · 2023-09-07 · ·

A superconductor device comprises a graphite structure, a first electrode, a second electrode, and a wrinkle region. The graphite structure comprises at least one topmost atomic layer. The first electrode is arranged over the at least one topmost atomic layer. The second electrode is arranged over the at least one topmost atomic layer and spaced apart from the first electrode. The wrinkle region is comprised in the at least one topmost atomic layer. The wrinkle region is arranged between the first electrode and the second electrode and comprises a plurality of wrinkles with a pair of wrinkles. The first electrode and the second electrode both electrically contact both wrinkles of the pair. A distance between the wrinkles of the pair is at most 0.2 μm.

GRAPHITIC ROOM-TEMPERATURE SUPERCONDUCTOR
20230284539 · 2023-09-07 · ·

A superconductor device comprises a graphite structure, a first electrode, a second electrode, and a wrinkle region. The graphite structure comprises at least one topmost atomic layer. The first electrode is arranged over the at least one topmost atomic layer. The second electrode is arranged over the at least one topmost atomic layer and spaced apart from the first electrode. The wrinkle region is comprised in the at least one topmost atomic layer. The wrinkle region is arranged between the first electrode and the second electrode and comprises a plurality of wrinkles with a pair of wrinkles. The first electrode and the second electrode both electrically contact both wrinkles of the pair. A distance between the wrinkles of the pair is at most 0.2 μm.

DOWNSTOP AND BUMP BONDS FORMATION ON SUBSTRATES
20230363295 · 2023-11-09 ·

An electronic structure includes a first substrate having a first under bump metallization (UBM) region and a second UBM region formed thereon. One or more solder bumps is deposited onto the first UBM region. A downstop formed on the second UBM region is wider, shallower and more rigid than any one of the solder bumps formed on the first UBM region. A second substrate is joined to the first substrate by the one or more solder bumps located on the first UBM region, and a height of the downstop limits a distance between at least one of the first substrate and the second substrate, or between an object and at least one of the first substrate and the second substrate.

DOWNSTOP AND BUMP BONDS FORMATION ON SUBSTRATES
20230363295 · 2023-11-09 ·

An electronic structure includes a first substrate having a first under bump metallization (UBM) region and a second UBM region formed thereon. One or more solder bumps is deposited onto the first UBM region. A downstop formed on the second UBM region is wider, shallower and more rigid than any one of the solder bumps formed on the first UBM region. A second substrate is joined to the first substrate by the one or more solder bumps located on the first UBM region, and a height of the downstop limits a distance between at least one of the first substrate and the second substrate, or between an object and at least one of the first substrate and the second substrate.

METHOD FOR FABRICATING AIR BRIDGE, AIR BRIDGE STRUCTURE, AND SUPERCONDUCTING QUANTUM CHIP

This disclosure includes a method for fabricating an air bridge, an air bridge structure, and a superconducting quantum chip, and relates to the field of circuit structures. In some examples, a method for fabricating an air bridge includes forming an air bridge brace structure on a substrate, and forming, on the air bridge brace structure and the substrate, an air bridge material layer with one or more openings in the air bridge material layer that reveal the air bridge brace structure. The air bridge material layer with the one or more openings is formed based on a patterned photoresist layer with patterns corresponding to the one or more openings. The method further includes removing, based on the one or more openings in the air bridge material layer, the air bridge brace structure to obtain the air bridge having the one or more openings.

METHOD AND SYSTEM FOR GENERATING AND REGULATING LOCAL MAGNETIC FIELD VARIATIONS FOR SPIN QUBIT MANIPULATION USING MICRO-STRUCTURES IN INTEGRATED CIRCUITS

The embodiments herein provide a method and a system for generating and regulating local magnetic field variations required for spin qubit manipulation based on scalable quantum processors using micro-structures in integrated circuits. In an embodiment the system provides an adaptive and independent magnetic-field control to each qubit on a hardware substrate and comprises several micro/nano-scale current-carrying structures near a qubit for controlling and manipulating the qubit using the locally generated variable magnetic field, in-turn controlled by the tunable current flowing through these structures. The current-carrying structures in conjunction with fast current control provides fast switching/tuning of magnetic fields for rapid adiabatic passage control of one or more qubits simultaneously. The tenability of the qubits allows post-fabrication setting of adaptive magnetic field strengths and frequency separation of qubits thereby enabling the qubits to simultaneously realize their intended control signals without any added disturbance from neighboring qubits.

FABRICATION METHODS

Various fabrication methods are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.

Fabrication methods

Various fabrication method are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.