The present invention discloses a design for reducing a dark count rate of a superconducting nanowire single photon detector (SNSPD) based on a two-wire structure, which includes: intertwining two niobium nitride nanowires that are not crossed to form an SNSPD of a two-wire structure; regulating and controlling behaviors of one nanowire by adopting the other nanowire, and regulating bias current to be close to superconducting critical current; introducing an optical signal into a photosensitive area of the detector by adopting an optical fiber; outputting two channels of signals respectively through the two nanowires to make the dark count rates of the two nanowires mutually excited; and through a voltage comparator and an exclusive-OR gate, reducing a dark count rate signal, and retaining a photon response signal. The generation of the dark count rate of the detector can be inhibited effectively by the unique performance of the SNSPD of the two-wire structure; and by improving the process latter, the coupling efficiency of the dark count rate of the SNSPD is further improved, which is expected to completely inhibit the dark count rate of the SNSPD system and greatly increase the signal-to-noise ratio of the detector.

The present invention discloses a design for reducing a dark count rate of a superconducting nanowire single photon detector (SNSPD) based on a two-wire structure, which includes: intertwining two niobium nitride nanowires that are not crossed to form an SNSPD of a two-wire structure; regulating and controlling behaviors of one nanowire by adopting the other nanowire, and regulating bias current to be close to superconducting critical current; introducing an optical signal into a photosensitive area of the detector by adopting an optical fiber; outputting two channels of signals respectively through the two nanowires to make the dark count rates of the two nanowires mutually excited; and through a voltage comparator and an exclusive-OR gate, reducing a dark count rate signal, and retaining a photon response signal. The generation of the dark count rate of the detector can be inhibited effectively by the unique performance of the SNSPD of the two-wire structure; and by improving the process latter, the coupling efficiency of the dark count rate of the SNSPD is further improved, which is expected to completely inhibit the dark count rate of the SNSPD system and greatly increase the signal-to-noise ratio of the detector.

A method for etching a surface including obtaining a structure comprising a plurality of nanowires on or above a substrate and a dielectric layer on or above the nanowires, wherein the dielectric layer comprises protrusions formed by the underlying nanowires; reacting a surface of the dielectric layer with a reactant, comprising a gas or a plasma, to form a reactive layer on the dielectric layer, wherein the reactive layer comprises a chemical compound including the reactant and elements of the dielectric layer and the reactive layer comprises sidewalls defined by the protrusions; and selectively etching the reactive layer, wherein the etching etches the protrusions laterally through the sidewalls so as to planarize the surface and remove or shrink the protrusions.

Techniques regarding parallel gradiometric SQUIDs and the manufacturing thereof are provided. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a first pattern of superconducting material located on a substrate. Also, the apparatus can comprise a second pattern of superconducting material that can extend across the first pattern of superconducting material at a position. Further, the apparatus can comprise a Josephson junction located at the position, which can comprise an insulating barrier that can connect the first pattern of superconductor material and the second pattern of superconductor material.

A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.

A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.

A reinforced thin-film device is disclosed. The reinforced thin-film device comprising: a substrate having a top surface for supporting an epilayer; a mask layer patterned with a plurality of nanosize cavities disposed on said substrate to form a needle pad; a thin-film of, relative to the substrate, lattice-mismatched semiconductor disposed on said mask layer, wherein said thin-film comprises a plurality of in parallel spaced semiconductor needles of said lattice-mismatched semiconductor embedded in said thin-film, wherein said plurality of semiconductor needles are vertically disposed in the axial direction towards said substrate in said plurality of nanosize cavities of said mask layer; a, relative to the substrate, lattice-mismatched semiconductor epilayer provided on said thin-film and supported thereby; and a FinFET transistor arranged on the lattice-mismatched semiconductor epilayer. The FinFET transistor comprising: a fin semiconductor structure comprising an elongate protruding core portion, the fin semiconductor structure being arranged on the lattice-mismatched semiconductor epilayer, a first and a second nanostructured electrode radially enclosing respectively a source end and a drain end of the protruding core portion, and a nanostructured gate electrode radially enclosing a central portion of the protruding core portion, the central portion being a portion of the protruding core portion between the source end and the drain end.

A superconducting circuit includes a first component having a first connection point. The first connection point has a first width. The superconducting circuit includes a second component having a second connection point. The second connection point has a second width that is larger than the first width. The superconducting circuit includes a superconducting connector shaped to reduce current crowding. The superconducting connector electrically connects the first connection point and the second connection point. The superconducting connector includes a first taper positioned adjacent the first connection point and having a non-linear shape and a second taper positioned adjacent the second connection point.

A superconducting circuit includes a first component having a first connection point. The first connection point has a first width. The superconducting circuit includes a second component having a second connection point. The second connection point has a second width that is larger than the first width. The superconducting circuit includes a superconducting connector shaped to reduce current crowding. The superconducting connector electrically connects the first connection point and the second connection point. The superconducting connector includes a first taper positioned adjacent the first connection point and having a non-linear shape and a second taper positioned adjacent the second connection point.

Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.