Patent classifications
H10N60/85
KINETIC INDUCTANCE DEVICES, METHODS FOR FABRICATING KINETIC INDUCTANCE DEVICES, AND ARTICLES EMPLOYING THE SAME
Superconducting integrated circuits and methods of forming these circuits are discussed. One superconducting integrated circuit has a substrate and a control device formed by a layer of high kinetic inductance material overlying the substrate. The control device has a loop of material, electrical connections between the loop of material and a power line, a coupling element connected to the loop of material, a pair of Josephson junctions that interrupt the loop of material, and an energy storage element connected to the loop of material. An alternative superconducting integrated circuit has a kinetic inductance device formed in a high kinetic inductance layer. The device has a compound Josephson junction structure with two parallel current paths with respective Josephson junctions, a loop of material connected to the compound Josephson junction structure, and a coupling structure. The circuit also has an additional device that couples to the coupling structure.
MONOLITHIC SILICON JOSEPHSON JUNCTIONS FOR SUPERCONDUCTING QUBITS
A monolithic silicon Josephson junction can be fabricated from a silicon wafer using semiconductor technologies such as gas immersion laser doping and smart cut technology. Rather than using a superconducting metal for the junction electrodes, silicon that has been highly doped with boron can serve as the superconducting material for the electrodes of the Josephson junction. A region of the silicon wafer that has not been doped serves as the tunnel barrier. Fabrication of the Josephson junction does not require a metallization process since the electrodes and tunnel barrier are formed from highly doped silicon and non-doped silicon, respectively. The single-crystal structure of the resulting Josephson junction yields low two-level system (TLS) noise.
MONOLITHIC SILICON JOSEPHSON JUNCTIONS FOR SUPERCONDUCTING QUBITS
A monolithic silicon Josephson junction can be fabricated from a silicon wafer using semiconductor technologies such as gas immersion laser doping and smart cut technology. Rather than using a superconducting metal for the junction electrodes, silicon that has been highly doped with boron can serve as the superconducting material for the electrodes of the Josephson junction. A region of the silicon wafer that has not been doped serves as the tunnel barrier. Fabrication of the Josephson junction does not require a metallization process since the electrodes and tunnel barrier are formed from highly doped silicon and non-doped silicon, respectively. The single-crystal structure of the resulting Josephson junction yields low two-level system (TLS) noise.
Axis Josephson Junctions with Improved Smoothness
According to various implementations of the invention, high quality a-axis XBCO may be grown with low surface roughness. According to various implementations of the invention, low surface roughness may be obtained by: 1) adequate substrate preparation; 2) calibration of flux rates for constituent atoms; and/or 3) appropriate control of temperature during crystal growth. According to various implementions of the invention, a wafer comprises a smoothing layer of c-axis XBCO; a first conducting layer of a-axis XBCO formed on the smoothing layer; an insulating layer formed on the first conducting layer; and a second conducting layer of a-axis XBCO formed on the insulating layer, where, for a same surface roughness, a thickness of the smoothing layer and the first conducting layer combined is greater than a thickness of the first conducting layer without the smoothing layer. According to various implementations of the invention, a Josephson Junction is etched out of the XBCO/insulating layer/XBCO trilayer by: ion mill etching the top XBCO layer and some of the insulating layer to intentionally leave some of the insulating layer on the bottom XBCO layer; and/or ion mill etching at least the insulating layer at an off angle to reduce or minimize ion damage to the bottom XBCO layer otherwise introduced by the ion mill.
Method for producing an at least two-part structure, in particular a semifinished product for a superconducting wire
A method for producing an at least two-part structure, such as a semifinished product for a superconducting wire is provided. A first structure and a second structure are separately produced, and the first structure and the second structure are then inserted one into the other. The first structure and the second structure are respectively produced in layers by selective laser melting or selective electron beam melting of a powder. The method produces two-part structures for semifinished products of superconducting wires.
Band-Pass Josephson Traveling Wave Parametric Amplifier
A bandpass parametric amplifier circuit includes a plurality of unit cells. At least one unit cell includes a first inductor having a first node coupled to a center conductor and a second node coupled to ground. There is a first capacitor having a first node coupled to the center conductor and a second node coupled to ground. There is a second inductor having a first node coupled to the center conductor. A second capacitor has a first node coupled to a second node of the second inductor. The second capacitor and the second inductor are in series with the center conductor.
Superconductive Memory Cells and Devices
An electronic device (e.g., a superconducting memory cell) includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material is patterned to form a plurality of distinct instances of the layer of superconducting material including: a first wire; and a loop that is (i) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state. The loop is configured to form a persistent current via the capacitive coupling in response to a write current applied to the first wire while the loop and the first wire are in the superconducting state. The persistent current represents a logic state of the electronic device.
GRAIN SIZE CONTROL OF SUPERCONDUCTING MATERIALS IN THIN FILMS FOR JOSEPHSON JUNCTIONS
A superconducting circuit includes a Josephson junction device including a lower superconducting material layer formed on a substrate and a junction layer formed on the lower superconducting material layer. The superconducting circuit also includes an upper superconducting material layer formed over the junction layer. At least the lower superconducting material layer comprises grains having a size that is larger than a size of the Josephson junction.
TERAHERTZ TRANSISTOR
Superconducting Meissner effect transistors, methods of modulating, and systems are disclosed. In one aspect a disclosed transistor includes a superconducting bridge between a first and a second current probe, the first and second current probe being electrically connected to a source and a drain electrical connection, respectively and a control line configured to emit a magnetic field signal having signal strength H.sub.sig at the superconducting bridge. In one aspect the emitted magnetic field is configured to break Cooper pairs in the superconducting bridge.
HIGH CRITICAL TEMPERATURE METAL NITRIDE LAYER WITH OXIDE OR OXYNITRIDE SEED LAYER
A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.