A chip resistor includes an insulating substrate made of alumina, a pair of electrodes disposed on an upper surface of the insulating substrate, a glass glaze layer made of glass disposed on the upper surface of the insulating substrate, and a resistive element disposed on the upper surface of the glass glaze layer. The resistive element is disposed between the pair of electrodes. The softening point of the glass of the glass glaze layer ranges from 580 C. to 760 C. This chip resistor prevents the resistive element from being peeled off.

A multilayer component and a mathod for producing a multilayer component are disclosed. In an embodiment a multilayer component includes a ceramic main element and at least one metal structure, wherein the metal structure is cosintered and wherein main element is a varistor ceramic having 90 mol % of ZnO, from 0.5 to 5 mol % of Sb.sub.2O.sub.3, from 0.05 to 2 mol % of Co.sub.3O.sub.4, Mn.sub.2O.sub.3, SiO.sub.2 and/or Cr.sub.2O.sub.3, and <0.1 mol % of B.sub.2O.sub.3, Al.sub.2O.sub.3 and/or NiO.

A thick-film aluminum (Al) electrode paste is provided to fabricate a chip resistor. The paste is a mixture of a vanadium-zinc-boron series glass (V.sub.2O.sub.5ZnOB.sub.2O.sub.3 or BaOZnOB.sub.2O.sub.3) along with a metal oxide, aluminum granules, and an organic additive, whose proportions are separately 330 wt %, 0.115 wt %, 5070 wt %, and 1020 wt %. After being stirred through three rollers and filtered, the paste is pasted on an alumina ceramic substrate. The pasted substrate is dried and sintered for forming a thick-film aluminum electrode. Meanwhile, before processing metal plating that follows, an anti-plating pretreatment is performed. Therein, surface irregularities and nonconductive alumina on the surface are removed. Thus, the electrode obtains smooth flat surface and low oxygen content. The characteristics of the chip resistor using the thick-film aluminum electrode are equivalent to those using thick-film printed silver electrodes and those using thick-film printed copper electrodes sintered in a reducing atmosphere.

A chip resistor according to the present invention includes an insulating substrate, a pair of back surface electrodes, a pair of top surface electrodes, a resistor, and a pair of end face electrodes. The back surface electrode includes the first electrode portion located inwardly and away from the end face of the insulating substrate, and the two second electrode portions arranged on two portions, respectively, in the short direction of the insulating substrate with the cutout portion, which is positioned between the end face of the insulating substrate and the first electrode portion, being interposed therebetween, and the maximum height of the first electrode portion is set to be more than the maximum height of the second electrode portions.

Shown herein is a method of forming an electrical resistor comprising the steps of: forming an electrically resistive layer on a substrate; measuring an electrical resistance-related parameter of the electrically resistive layer and determining a target length of the electrically resistive layer corresponding to a target electrical resistance; and forming first and second electrically conductive terminals contacting the electrically resistive layer, said first and second electrically conductive terminals being separated by a distance corresponding to the target length.

A surface mount electronic component includes an element including a dielectric layer that includes a first main surface and a second main surface, a first external electrode disposed on the first main surface, a second external electrode disposed on the second main surface, a first metal terminal connected to the first external electrode, a second metal terminal connected to the second external electrode, and an exterior material covering at least a portion of the element, the first and second external electrodes, and the first and second metal terminals. Upper and lower surfaces of the exterior material are flat or substantially flat.

A multilayer component and a mathod for producing a multilayer component are disclosed. In an embodiment a multilayer component includes a ceramic main element and at least one metal structure, wherein the metal structure is cosintered and wherein main element is a varistor ceramic having 90 mol % of ZnO, from 0.5 to 5 mol % of Sb.sub.2O.sub.3, from 0.05 to 2 mol % of Co.sub.3O.sub.4, Mn.sub.2O.sub.3, SiO.sub.2 and/or Cr.sub.2O.sub.3, and <0.1 mol % of B.sub.2O.sub.3, Al.sub.2O.sub.3 and/or NiO.

A sensor element and a method for producing a sensor element are disclosed. In an embodiment a sensor element for temperature measurement includes a ceramic carrier and at least one NTC layer printed on the carrier, wherein the NTC layer covers at least part of a surface of the carrier, and wherein the sensor element is designed for wireless contacting.

A surface mount electronic component includes an element including a dielectric layer that includes a first main surface and a second main surface, a first external electrode disposed on the first main surface, a second external electrode disposed on the second main surface, a first metal terminal connected to the first external electrode by solder, a second metal terminal connected to the second external electrode by the solder, and an exterior material covering at least a portion of the element, the first and second external electrodes, and the first and second metal terminals. The solder satisfies a relational expression: element diameter D (mm)about 0.003 mmsolder cross-sectional area S (mm.sup.2)element diameter D (mm)about 0.02 mm.

A multilayer ceramic capacitor includes dielectric layers and internal electrode layers provided on the dielectric layers. The dielectric layers each include a perovskite compound that includes Ca and Zr, and optionally Sr and Ti. Mn is disposed at an interface between one of the dielectric layers and one of the internal electrode layers, and a Mn/Zr molar ratio at the interface is not less than about 0.117.