A method for fabricating a varistor device is presented. In an embodiment the method includes providing a base body for the varistor device, wherein the base body comprises a ceramic material, providing a basic material for a base metal electrode region on the base body, exposing the base body with the basic material to a temperature under a protective gas atmosphere such that the base metal electrode region is formed and firmly connected to the base body and completing the varistor device.

A method for manufacturing a chip resistive element including a substrate, a resistor formed on the substrate, and electrodes connected to opposite ends of the resistor, the method including an electrode forming step of forming the electrodes on the substrate. The electrode forming step includes a step of forming a first electrode layer on the substrate using a first electrode material containing silver, and a step of forming a second electrode layer on the first electrode layer using a second electrode material containing silver and palladium. The first electrode material has a higher silver content than the second electrode material.

A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.

A method for producing a multi-layer varistor component is specified. A main body for the multi-layer varistor component includes a plurality of internal electrodes. The method further includes providing the main body with a starting material for a copper electrode layer in such a way that the starting material is directly connected to at least one internal electrode. A thermal treatment of the starting material is performed under a protective gas atmosphere in order to form the copper electrode layer.

A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.

A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.

A sensor element, a sensor arrangement, and a method for manufacturing a Sensor element are disclosed. In an embodiment, a sensor element includes a ceramic main body and at least one electrode arranged at the main body, wherein the electrode has at least one layer comprising nickel.

A chip resistor includes an insulating substrate, a pair of front electrodes provided on the insulating substrate, a resistor provided to connect between the pair of front electrodes, a glass body provided on the resistor, a trimming groove formed in the resistor through the glass body, a first protective film formed to cover the trimming groove, a second protective film formed to cover the first protective film, a pair of end face electrodes formed to be connected to the front electrodes, and a pair of external plating layers formed to cover the end face electrodes, respectively, wherein the first protective film is made of a resin material containing a heat dissipating filler, and the second protective film is made of a resin material.

A multilayer varistor includes a sintered body, an internal electrode disposed in the sintered body, a high-resistance layer covering at least part of the sintered body, and an external electrode covering part of the high-resistance layer, the external electrode being electrically connected to the internal electrode. An arithmetic mean roughness of a surface of the high-resistance layer is greater than or equal to 0.06 m.

A chip resistor according to the present invention includes an insulating substrate, a pair of back surface electrodes, a pair of top surface electrodes, a resistor, and a pair of end face electrodes. The back surface electrode includes the first electrode portion located inwardly and away from the end face of the insulating substrate, and the two second electrode portions arranged on two portions, respectively, in the short direction of the insulating substrate with the cutout portion, which is positioned between the end face of the insulating substrate and the first electrode portion, being interposed therebetween, and the maximum height of the first electrode portion is set to be more than the maximum height of the second electrode portions.