A planar, in particular intrinsically safe transformer, having: a sandwich-type layer structure having a plurality of layers extending horizontally and arranged vertically on top of one another, including a first and a second conductive layer and at least one insulating inner layer disposed between the two conductive layers, a plurality of electrical circuits, wherein a first electrical circuit and at least a second electrical circuit are galvanically isolated from each other; and at least one ring-type magnetic core having a hole, which acts at least on the first electrical circuit and the second electrical circuit. The core is arranged within the at least one insulating inner layer, a conductor of the first electrical circuit and a conductor of the second electrical circuit each have a winding with at least one winding turn, and the at least one winding turn of the first electrical circuit and the at least one winding turn of the second electrical circuit each run along the first conductive layer and along the second conductive layer and through the at least one insulating inner layer and through the hole of the core.

A semiconductor device package having galvanic isolation is provided. The semiconductor device package includes a package substrate having a first inductive coil. A first semiconductor die is attached to a first major surface of the package substrate. The first semiconductor die includes a second inductive coil substantially aligned with the first inductive coil. A second semiconductor die is attached to the first major surface of the package substrate. A wireless communication link between the first semiconductor die and the second semiconductor die is formed by way of the first and second inductive coils.

An isolator includes a lower electrode, a first insulating layer, a second insulating layer, an upper electrode, and a low permittivity portion. The first insulating layer is provided on the lower electrode, and includes a protruding portion in an upper portion of the first insulating layer. The second insulating layer is provided on the protruding portion, extends sideways from a region directly above the protruding portion, and has a specific permittivity higher than a specific permittivity of the first insulating layer. The upper electrode is in contact with an upper surface of the second insulating layer. The low permittivity portion is in contact with a side surface of the protruding portion and a lower surface of the second insulating layer. The low permittivity portion has a specific permittivity lower than the specific permittivity of the first insulating layer.

A micro-isolator is described. The micro-isolator may include a first isolator element, a second isolator element, and a first dielectric material separating the first isolator element from the second isolator element. A second dielectric material may completely or partly encapsulate the second isolator element, or may be present at outer corners of the second isolator element. The second dielectric material may have a larger bandgap than the first dielectric material, and its configuration may reduce electrostatic charge injection into the first dielectric material. The micro-isolator may be formed using microfabrication techniques.

A digital isolator according to an embodiment includes a first electrode, a first insulating part, a second electrode, a second insulating part, and a first dielectric part. The first insulating part is located under the first electrode. The second electrode is located under the first insulating part. The second insulating part is located around the first electrode along a first plane perpendicular to a first direction. The first direction is from the second electrode toward the first electrode. The first dielectric part is located between the first electrode and the second insulating part in a second direction along the first plane. The first dielectric part contacts the first electrode. A relative dielectric constant of the first dielectric part is greater than a relative dielectric constant of the first insulating part.

An isolation transformer includes: a Faraday cage and an input ground terminal for connecting to the Faraday cage; and an output ground terminal connected to the Faraday cage for further connection to a further circuit. The isolation trans-former further has a clean ground input terminal for receiving an external clean ground; a clean ground output terminal for connecting to a further clean ground input terminal of the further circuit; and a physical electrical node placed at a location within the Faraday cage where the magnetic flux and electric field are the lowest. The clean ground input terminal is electrically fed into the isolation transformer and connected to the physical electrical node through a first electric connection, and the physical electrical node is further electrically connected to a clean ground output terminal through a second electric connection. The invention provides for a low-EMI isolation transformer.

Interface circuits for differential signal channels. The interface circuit includes, for example, a transformer, a common mode choke, and a bidirectional transient voltage suppressor (TVS) diode. The transformer is coupled to two circuit side terminals of a differential signal channel. The common mode choke is coupled to the transformer. The common mode choke is also coupled to the two line side terminals of the differential signal channel via a first signal path and a second signal path. The bidirectional TVS diode includes a first output connection coupled to the first signal path. The bidirectional TVS diode also includes a second output connection coupled to the second signal path.

A semiconductor device package having galvanic isolation is provided. The semiconductor device package includes a package substrate having a first inductive coil. A first semiconductor die is attached to a first major surface of the package substrate. The first semiconductor die includes a second inductive coil substantially aligned with the first inductive coil. A second semiconductor die is attached to the first major surface of the package substrate. A wireless communication link between the first semiconductor die and the second semiconductor die is formed by way of the first and second inductive coils.

The present disclosure provides a signal convertor, which includes a circuit board, a plurality of isolation transformers, a capacitor, a signal-converting module, an electrical connection interface and a plugging interface. The isolation transformers, the capacitor, the signal-converting module are disposed on the circuit board. The signal-converting module is for converting a plugging signal received from the plugging interface into an electrical signal and transferring the electrical signal to the isolation transformers, or for converting the electrical signal received from the isolation transformers into the plugging signal and transferring the plugging signal to the plugging interface.

A semiconductor device includes a conductive support member, a first semiconductor element, a second semiconductor element, an insulating element, and a sealing resin. The conductive support member includes a first die pad and a second die pad, which are separated from each other in a first direction. The first die pad and the second die pad overlap each other when viewed along the first direction. When viewed along a thickness direction, a peripheral edge of the first die pad has a first near-angle portion including a first end portion in a second direction orthogonal to both the thickness direction and the first direction. The first near-angle portion is separated from the second die pad in the first direction toward the first end portion in the second direction.