H01F2027/2809

THIN FILM INDUCTOR
20220406513 · 2022-12-22 ·

A thin film inductor is provided. The thin film inductor includes a first coil assembly, a first magnetic layer, and a second magnetic layer. The first coil assembly includes a first substrate and two first electrically conductive circuits respectively arranged on two surfaces of the first substrate that are opposite to each other. The first magnetic layer and the second magnetic layer are respectively arranged on the two surfaces of the first substrate that are opposite to each other, and the two first electrically conductive circuits are respectively embedded in the first magnetic layer and the second magnetic layer. The first substrate has a first non-circuit layout, and the first electrically conductive circuit is arranged around the first non-circuit layout. A ratio between an area of the first non-circuit layout and an area of the first substrate is 0.1 or more.

Thin film inductor and power conversion circuit

A thin film inductor is disclosed, which includes a thin film magnetic core. The thin film magnetic core includes at least one magnetic thin film. In each magnetic thin film, at least one type-1 gap is provided. A length direction of the type-1 gap is parallel to a direction of hard magnetization of the magnetic thin film. If the thin film magnetic core comprises at least two magnetic thin films, the at least two magnetic thin films are laminated and overlap each other. A sum of widths of all type-1 gaps in each magnetic thin film is the same.

Inductance element and electronic device
11532424 · 2022-12-20 · ·

An inductance element includes: an insulative substrate body of a rectangular solid shape having length dimension L, height dimension H, and width dimension W, where 1.5≤W/H; at least one internal conductor built in the substrate body and capable of making an electrical current flow therethrough in one uniform direction orthogonal to a cross-section of the substrate body; and a pair of external electrodes provided on the surface of the substrate body in a manner respectively connected to both ends of the internal conductor, so that the internal conductor can make an electrical current flow therethrough in the one uniform direction; wherein, in the cross-section of the substrate body, a rectangular internal conductor region having height dimension Eh and width dimension Ew surrounds the internal conductor in a manner contacting the outermost positioned portions of the internal conductor in the height and width directions, wherein Ew/Eh>W/H.

Laminated transformer-type transmitter-receiver device and method of fabricating same

A laminated transformer-type transmitter-receiver device for transmitting or delivering electrical signals and/or power. The laminated device can include two metal shielding layers disposed between transmit and receive windings, which, in turn, are disposed between two magnetic layers. The laminated device further includes a dielectric isolation layer disposed between the two metal shielding layers. In the laminated device, no (or very little) common mode capacitance is distributed within the dielectric isolation layer, and no (or very little) common mode or “leakage” current flows across the dielectric isolation layer. As a result, various adverse effects of the common mode capacitance and the leakage current during operation of the laminated device are avoided.

Transformer-based wideband filter with ripple reduction

A radio frequency filtering circuitry includes a first inductor, a second inductor, and a conductive loop. The first inductor receives a first current that induces a second current in the second inductor upon receiving the first current. The first inductor and/or the second inductor induce a third current in the conductive loop. The conductive loop adjusts the third current to reduce a first gain peak of an output signal to correlate to a second gain peak of the output signal.

Planar Transformers With Interleaved Windings And High Voltage Isolation

Various embodiments of the present disclosure relate to power conversion using a planar transformer assembly that provides medium-voltage isolation at high frequencies. A planar transformer comprises primary and secondary planar windings configured to generate an isolated output. Each primary and secondary winding is interleaved on layers of a printed circuit board using one or more vias within the layers of the printed circuit board. The planar transformer also comprises a magnetic core and a field-shaping apparatus coupled with the printed circuit board. The field-shaping apparatus is configured to shape an electric field generated by the windings. The primary windings can be coupled to a DC source via switching devices while the secondary windings can be coupled via switching devices to one or more DC ports followed by AC inverters configured to generate three single-phase AC outputs for medium voltage applications.

MULTILAYER COIL COMPONENT

A multilayer coil component includes a multilayer body in which a plurality of insulating layers are stacked in a stacking direction and a coil inside, and outer electrodes on surfaces of the multilayer body and electrically connected to the coil. The insulating layers have a magnetic phase having spinel structure containing at least Fe, Ni, Zn, and Cu and a non-magnetic phase containing at least Si. When grain sizes D50 and D90 of crystal grains constituting the magnetic phase are respectively defined as equivalent-area circle diameters of 50% and 90% on a cumulative sum basis in a cumulative distribution of equivalent-area circle diameters of the crystal grains, the grain size D50 is from 50 nm to 750 nm, and the grain size D90 is from 200 nm to 1500 nm.

PACKAGE SUBSTRATE Z-DISAGGREGATION WITH LIQUID METAL INTERCONNECTS

A z-disaggregated integrated circuit package substrate assembly comprises a first substrate component (a coreless patch), a second substrate component (a core patch), and a third substrate component (an interposer). The coreless patch comprises thinner dielectric layers and higher density routing and can comprise an embedded bridge to allow for communication between integrated circuit dies attached to the coreless patch. The core layer acts as a middle layer interconnect between the coreless patch and the interposer and comprises liquid metal interconnects to connect the core patch physically and electrically to the coreless patch and the interposer. Core patch through holes comprise liquid metal plugs. Some through holes can be surrounded by and coaxially aligned with magnetic plugs to provide improved power signal delivery. The interposer comprises thicker dielectric layers and lower density routing. The substrate assembly can reduce cost and provide improved overall yield and electrical performance relative to monolithic substrates.

Package including fully integrated voltage regulator circuitry within a substrate
11527483 · 2022-12-13 · ·

Embodiments herein relate to integrating FIVR switching circuitry into a substrate that has a first side and a second side opposite the first side, where the first side of the substrate to electrically couple with a die and to provide voltage to the die and the second side of the substrate is to couple with an input voltage source. In embodiments, the FIVR switching circuitry may be printed onto the substrate using OFET, CNT, or other transistor technology, or may be included in a separate die that is incorporated within the substrate.

Inductor

An inductor includes a first conductor, a second conductor, an insulation film, and a magnetic body. The first conductor spirally extends in a plane. The second conductor spirally extends in a plane. The second conductor is stacked on and joined to the first conductor. The insulation film covers a surface of the first conductor and a surface of the second conductor. The magnetic body covers a surface of the insulation film and embeds the first conductor and the second conductor. The first conductor and the second conductor are connected to form a helical coil.