An electromagnetic device and a method for manufacturing the same are disclosed. The electromagnetic device includes a base plate, a magnetic core, multiple transmission units, and connection layers. The base plate includes a central part defining multiple inner via holes and a peripheral part defining multiple outer via holes. An annular accommodating groove is defined between the central part and the peripheral part. The magnetic core is received in the annular accommodating groove. Transmission units are located on both sides of the base plate. Each transmission unit includes a transmission wire layer including multiple conductive wire patterns, and each conductive wire pattern bridges one inner via hole and one outer via hole. Each of the connection layers is set on one side of the transmission wire layer close to the base plate. At least one connection layer has a dielectric loss no larger than 0.02.

Disclosed are apparatus and methods for embedded high voltage transformer components. Industrial applications require transformers that provide high voltage isolation. The laminate materials used for fabricating Printed Circuit Boards (PCB) are very good insulators and PCB transformers can provide higher voltage isolation than traditional wire wound devices. There are a variety of PCB laminate materials with different properties for voltage breakdown. FR-4 laminate is commonly used and has voltage breakdown properties exceeding 10 kV/mm. To produce PCB transformers with breakdown voltages exceeding 5 kV, it is beneficial to use laminate with much higher breakdown voltages. Generally, the materials with high breakdown voltage cost more. High voltage isolation can be achieved at a moderate cost by mixing low cost FR-4 laminate with high voltage dielectric materials.

A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.

A variable direct current (DC) link power converter is described. In one example, the power converter includes a first converter stage configured to convert power from a power source to power at an intermediate link voltage and a second converter stage configured to convert the power at the intermediate link voltage to power for charging a battery. The power converter further includes a control system having an intermediate link voltage regulation control loop configured, in a first mode of operation, to regulate the intermediate link voltage through the first converter stage based on a voltage of the battery, and a ripple regulation control loop configured to sense a charging current for the battery and regulate a gain of the second converter stage based on the charging current to reduce ripple in the charging current. A new configuration of transformer suitable for use with the power converter is also described.

In an electronic circuit board of a power conversion device or the like, heat interference between parts mounted on a multi-layer printed circuit board is suppressed in order to place the mounted parts close to each other. The mounted parts include a semiconductor element and a magnetic part formed by a coil pattern, which is made from a copper foil of the printed circuit board, and by a magnetic core. A screw fixing portions is placed in the surroundings of the semiconductor element and the coil pattern. A heat radiation pattern connected to the screw fixing portion is provided between and around the semiconductor element and the coil pattern when viewed from a direction perpendicular to a principal surface of the multi-layer printed circuit board. The screw fixing portion is connected to a cooler in a manner that gives the screw fixing portion heat conductance and electrical conductance.

A planar transformer according to the present disclosure can include: at least one pair of cores arranged vertically and symmetrically; and a printed circuit board assembly including primary printed circuit boards having coil patterns forming a primary wiring and secondary printed circuit boards having coil patterns forming a secondary wiring, the secondary printed circuit boards respectively disposed over or under the primary printed circuit boards. The coil patterns of the primary printed circuit boards and the coil patterns of the secondary printed circuit boards can be alternately stacked.

Provided is a semiconductor device that has a configuration provided with: a driving unit for driving an upper switching element and a lower switching element according to a control signal for controlling the driving of the upper switching element and the lower switching element, which are connected in series to constitute a bridge circuit; an insulating unit having an insulating transformer; and a package for sealing at least a part of the insulating unit and the driving unit. The insulating unit transmits a signal corresponding to the control signal to the driving unit side while insulating the signal.

An inductor device includes a first inductor unit and a second inductor unit. The first inductor unit includes a first side to a fourth side, a first wire, and a first input terminal. The first wire is winded to form a plurality of circles. The first wire is winded in an interlaced manner at one of the first to fourth sides of the first inductor unit. The first input terminal is disposed on one of the first to fourth sides. The second inductor unit includes a fifth side to an eighth side, a second wire, and a second input terminal. The second wire is winded to form a plurality of circles. The second wire is winded in an interlaced manner at one of the fifth to eighth sides of the second inductor unit. The second input terminal is disposed on one of the fifth to eighth sides.

A transformer integrated type printed circuit board includes: a transformer including a core, a primary winding wire, and a secondary winding wire; and a printed circuit board including a surface layer and an internal layer in which wiring patterns are respectively formed, and having a plurality of insertion portions into which a plurality of leg portions of the core are respectively inserted. The primary winding wire is disposed in the surface layer of the printed circuit board so as to be wound between the leg portions, and the secondary winding wire is disposed in the internal layer of the printed circuit board so as to be wound between the leg portions. The primary winding wire is small in number of windings, is large in width, and is large in thickness, in comparison with the secondary winding wire.

The present disclosure relates to planar transformers including a plurality of circuit layers that are configured to reduce termination losses on at least one of the plurality of circuit layers. The plurality of circuit layers are stacked together in a first direction and include at least first and second circuit layers. The first and second circuit layers each include an electrically conductive trace forming at least one winding having a first termination portion and a second termination portion that are separated by a gap. The gaps of the first and second circuit layers are offset relative to each other in a second direction different from the first direction. The plurality of circuit layers may further include a third circuit layer, which includes an electrically conductive trace having a grounded portion that is disposed adjacent to at least one of the gaps of the first and second circuit layers.