H01F41/302

Voltage-controlled interlayer exchange coupling magnetoresistive memory device and method of operating thereof

A magnetoresistive memory device includes a magnetic tunnel junction comprising a free layer, a reference layer, and an insulating tunnel barrier layer located between the free layer and the reference layer, a perpendicular magnetic anisotropy (PMA) ferromagnetic layer that is vertically spaced from the free layer, an electrically conductive, non-magnetic interlayer exchange coupling layer located between the free layer and the PMA ferromagnetic layer. The magnetoresistive memory device is a hybrid magnetoresistive memory device which is programmed by a combination of a spin-torque transfer effect and a voltage-controlled exchange coupling effect.

Magnetic structures with tapered edges

Magnetic structures including magnetic inductors and magnetic tunnel junction (MTJ)-containing structures that have tapered sidewalls are formed without using an ion beam etch (IBE). The magnetic structures are formed by providing a material stack of a dielectric capping layer and a sacrificial dielectric material layer above a lower interconnect level. First and second etching steps are performed to pattern the sacrificial dielectric material layer and the dielectric capping layer such that a patterned dielectric capping layer is provided with a tapered sidewall. After removing the sacrificial dielectric material layer, a magnetic material-containing stack is formed within the opening in the patterned dielectric capping layer and atop the patterned dielectric capping layer. A planarization process is then employed to pattern the magnetic-containing stack by removing the magnetic material-containing stack that is located atop the patterned dielectric capping layer.

Spin-transfer torque magnetoresistive memory device with a free layer stack including multiple spacers and methods of making the same

A spin-transfer torque (STT) magnetoresistive memory device includes a first electrode, a second electrode, and a magnetic tunnel junction located between the first electrode and the second electrode. The magnetic tunnel junpction includes a reference layer having a fixed magnetization direction, a free layer stack, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer stack. The free layer stack has a total thickness of less than 2 nm, and contains in order, a proximal ferromagnetic layer located proximal to the nonmagnetic tunnel barrier layer, a first non-magnetic metal sub-monolayer, an intermediate ferromagnetic layer, a second non-magnetic metal sub-monolayer, and a distal ferromagnetic layer.

MAGNETORESISTIVE MEMORY DEVICE INCLUDING A HIGH DIELECTRIC CONSTANT CAPPING LAYER AND METHODS OF MAKING THE SAME
20210159392 · 2021-05-27 ·

Magnetoelectric or magnetoresistive memory cells include at least one of a high dielectric constant dielectric capping layer and/or a nonmagnetic metal dust layer located between the free layer and the dielectric capping layer.

MAGNETIC TUNNEL JUNCTION DEVICES AND METHODS OF FORMING THEREOF

In a non-limiting embodiment, a semiconductor device may include a magnetic tunnel junction (MTJ) stack. The MTJ stack may include a reference layer comprising a magnetic layer, a first tunneling barrier layer arranged over the reference layer, a free layer comprising a magnetic layer arranged over the first tunneling barrier layer, and a capping layer arranged over the reference layer, the first tunneling barrier layer and the free layer. The capping layer may be a non-magnetic layer. According to various non-limiting embodiments, the capping layer may include a rare earth element. According to various non-limiting embodiments, the MTJ stack may further include a second tunneling barrier layer arranged between the free layer and the capping layer. The capping layer may contact the second tunneling barrier layer.

Magnetic Memory Element Incorporating Dual Perpendicular Enhancement Layers
20210159399 · 2021-05-27 ·

The present invention is directed to a magnetic memory element including a magnetic free layer structure incorporating three magnetic free layers separated by two perpendicular enhancement layers (PELs) and having a variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a first magnetic reference layer formed adjacent to the insulating tunnel junction layer opposite the magnetic free layer structure; a second magnetic reference layer separated from the first magnetic reference layer by a third perpendicular enhancement layer; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The first and second magnetic reference layers have a first invariable magnetization direction substantially perpendicular to layer planes thereof. The magnetic fixed layer has a second invariable magnetization direction substantially opposite to the first invariable magnetization direction.

Magneto-resistance element in which I-III-VI2 compound semiconductor is used, method for manufacturing said magneto-resistance element, and magnetic storage device and spin transistor in which said magneto-resistance element is used

An object of the present invention is to provide a Magneto-Resistance (MR) element showing a high Magneto-Resistance (MR) ratio and having a suitable Resistance-Area (RA) for device applications. The MR element of the present invention has a laminated structure including a first ferromagnetic layer 16, a non-magnetic layer 18, and a second ferromagnetic layer 20 on a substrate 10, wherein the first ferromagnetic layer 16 includes a Heusler alloy, the second ferromagnetic layer 20 includes a Heusler alloy, the non-magnetic layer 18 includes a I-III-VI.sub.2 chalcopyrite-type compound semiconductor, and the non-magnetic layer 18 has a thickness of 0.5 to 3 nm, and wherein the MR element shows a Magneto-Resistance (MR) change of 40% or more, and has a resistance-area (RA) of 0.1 [Ωμm.sup.2] or more and 3 [Ωμm.sup.2] or less.

Magnetic stack, multilayer, tunnel junction, memory point and sensor comprising such a stack

A magnetic stack includes a first element including a ferromagnetic layer; a second element including a metal layer able to confer on the assembly formed by the first and the second elements a magnetic anisotropy perpendicular to the plane of the layers. The first element further includes a refractory metal material, the second element being arranged on the first element.

Nitride capping layer for spin torque transfer (STT) magnetoresistive random access memory (MRAM)

A magnetic tunnel junction (MTJ) is disclosed wherein first and second interfaces of a free layer (FL) with a first metal oxide (Hk enhancing layer) and second metal oxide (tunnel barrier), respectively, produce perpendicular magnetic anisotropy (PMA) to increase thermal stability. In some embodiments, a capping layer that is a conductive metal nitride such as MoN contacts an opposite surface of the Hk enhancing layer with respect to the first interface to reduce interdiffusion of oxygen and nitrogen compared with a TiN capping layer and maintain an acceptable resistance×area (RA) product. In other embodiments, the capping layer may comprise an insulating nitride such as AlN that is alloyed with a conductive metal to minimize RA. Furthermore, a metallic buffer layer may be inserted between the capping layer and Hk enhancing layer. As a result, electrical shorts are reduced and the magnetoresistive ratio is increased.

SPIN-ORBIT TORQUE-BASED SWITCHING DEVICE AND METHOD OF FABRICATING THE SAME

The present disclosure relates to a spin-orbit torque-based switching device and a method of fabricating the same. The spin-orbit torque-based switching device of the present disclosure includes a spin torque generating layer provided with a tungsten-vanadium alloy thin film exhibiting perpendicular magnetic anisotropy (PMA) characteristics and a magnetization free layer formed on the spin torque generating layer.