An embodiment includes a support unit, substrate treating apparatus and substrate treating method. The substrate treating apparatus comprises: a process chamber having a treatment space inside thereof; a support unit for supporting a substrate inside of the process chamber; and a gas supply unit for supplying the treatment gas into the treatment space, wherein the support unit comprises: an electrode layer of a metal material to which a high frequency electric power can be applied; a ground line having one end connected to the electrode layer and the other end grounded; and a switch provided on the ground line.

A semiconductor device includes a substrate having a semiconductor fin. A gate structure is over the semiconductor fin, in which the gate structure has a tapered profile and comprises a gate dielectric. A work function metal layer is over the gate dielectric, and a filling metal is over the work function metal layer. A gate spacer is along a sidewall of the gate structure, in which the work function metal layer is in contact with the gate dielectric and a top portion of the gate spacer. An epitaxy structure is over the semiconductor fin.

A system for treating an object with plasma includes a vacuum processing chamber having a holder on which the object to be treated is placed, at least two subassemblies each including at least one plasma source able to generate a plasma and being supplied with radio-frequency power Pi and with a gas i of independent flow rate ni. The plasma generated by one of the subassemblies is a partially ionized gas or gas mixture of different chemical nature from the plasma generated by the other subassembly or subassemblies. A process for selectively treating a composite object employing such a device is described.

A method and apparatus for forming a backside coating on a substrate to counteract stresses from a previously deposited film is disclosed. In one embodiment, a method for flattening a bowed substrate includes providing a substrate having a film stack formed on a first major surface thereof, wherein the substrate comprises a bowed orientation, and forming a coating a second major surface of the substrate, wherein the coating is configured to counter stresses produced by the film stack and flattens the substrate from the bowed orientation.

A method includes bonding a first surface of a first semiconductor substrate to a first surface of a second semiconductor substrate and forming a cavity in the first area of the first semiconductor substrate, where forming the cavity comprises: supplying a passivation gas mixture that deposits a passivation layer on a bottom surface and sidewalls of the cavity, where during deposition of the passivation layer, a deposition rate of the passivation layer on the bottom surface of the cavity is the same as a deposition rate of the passivation layer on sidewalls of the cavity; and etching the first area of the first semiconductor substrate using an etching gas, where the etching gas is supplied concurrently with the passivation gas mixture, etching the first area of the first semiconductor substrate comprises etching in a vertical direction at a greater rate than etching in a lateral direction.

The present application relates to a scanning probe microscope comprising a probe arrangement for analyzing at least one defect of a photolithographic mask or of a wafer, wherein the scanning probe microscope comprises: (a) at least one first probe embodied to analyze the at least one defect; (b) means for producing at least one mark, by use of which the position of the at least one defect is indicated on the mask or on the wafer; and (c) wherein the mark is embodied in such a way that it may be detected by a scanning particle beam microscope.

A film processing method includes forming a target film, the target film having an upper surface. The method includes forming a carbon film on the upper surface of the target film. The method includes performing a first etching to format least one recess in the target film, with the carbon film serving as a mask. The method includes performing a second etching, by directing an ion beam through the at least one recess, to increase a depth of the at least one recess.

Implementations disclosed herein describe a bevel etch apparatus within a loadlock bevel etch chamber and methods of using the same. The bevel etch apparatus has a mask assembly within the loadlock bevel etch chamber. During an etch process, the mask assembly delivers a gas flow to control bevel etch without the use of a shadow frame. As such, the edge exclusion at the bevel edge can be reduced, thus increasing product yield.

A method includes forming a dummy gate over a substrate. A pair of gate spacers are formed on opposite sidewalls of the dummy gate. The dummy gate is removed to form a trench between the gate spacers. A first ion beam is directed to an upper portion of the trench, while leaving a lower portion of the trench substantially free from incidence of the first ion beam. The substrate is moved relative to the first ion beam during directing the first ion beam to the trench. A gate structure is formed in the trench.

The present application relates to a scanning probe microscope comprising a probe arrangement for analyzing at least one defect of a photolithographic mask or of a wafer, wherein the scanning probe microscope comprises: (a) at least one first probe embodied to analyze the at least one defect; (b) means for producing at least one mark, by use of which the position of the at least one defect is indicated on the mask or on the wafer; and (c) wherein the mark is embodied in such a way that it may be detected by a scanning particle beam microscope.