An ion implantation system and method provide a non-uniform flux of a ribbon ion beam. A spot ion beam is formed and provided to a scanner, and a scan waveform having a time-varying potential is applied to the scanner. The ion beam is scanned by the scanner across a scan path, generally defining a scanned ion beam comprised of a plurality of beamlets. The scanned beam is then passed through a corrector apparatus. The corrector apparatus is configured to direct the scanned ion beam toward a workpiece at a generally constant angle of incidence across the workpiece. The corrector apparatus further comprises a plurality of magnetic poles configured to provide a non-uniform flux profile of the scanned ion beam at the workpiece.

A method comprises depositing a mask layer on a front-side surface of a wafer, wherein a portion of the wafer has a first resistivity; with the mask layer in place, performing an ion implantation process on a backside surface of the wafer to implant a resistivity reduction impurity into the wafer through the backside surface of the wafer to lower the first resistivity of the portion of the wafer to a second resistivity; after performing the ion implantation process, removing the mask layer from the front-side surface of the wafer; and forming semiconductor devices on the front-side surface of the wafer.

A system may include a substrate stage to support a substrate, and a plurality of beam sources. The plurality of beam sources may include an ion beam source, the ion beam source arranged to direct an ion beam to the substrate, and a radical beam source, the radical beam source arranged to direct a radical beam to the substrate. The system may include a controller configured to control the ion beam source and the radical beam source to operate independently of one another, in at least one aspect, wherein the at least one aspect includes beam composition, beam angle of incidence, and relative scanning of a beam source with respect to the substrate.

A method includes depositing a second dielectric layer over a first dielectric layer, depositing a third dielectric layer over the second dielectric layer, patterning a plurality of first openings in the third dielectric layer, etching the second dielectric layer through the first openings to form second openings in the second dielectric layer, performing a plasma etching process directed at the second dielectric layer from a first direction, the plasma etching process extending the second openings in the first direction, and etching the first dielectric layer through the second openings to form third openings in the first dielectric layer.

A charged particle buncher includes a series of spaced apart electrodes arranged to generate a shaped electric field. The series includes a first electrode, a last electrode and one or more intermediate electrodes. The charged particle buncher includes a waveform device attached to the electrodes and configured to apply a periodic potential waveform to each electrode independently in a manner so as to form a quasi-electrostatic time varying potential gradient between adjacent electrodes and to cause spatial distribution of charged particles that form a plurality of nodes and antinodes. The nodes have a charged particle density and the antinodes have substantially no charged particle density, and the nodes and the antinodes are formed from a charged particle beam with an energy greater than 500 keV.

An ion source having an electrically isolated extraction plate is disclosed. By isolating the extraction plate, a different voltage can be applied to the extraction plate than to the body of the arc chamber. By applying a more positive voltage to the extraction plate, more efficient ion source operation with higher plasma density can be achieved. In this mode the plasma potential is increased, and the electrostatic sheath reduces losses of electrons to the chamber walls. By applying a more negative voltage, an ion rich sheath adjacent to the extraction aperture can be created. In this mode, conditioning and cleaning of the extraction plate is achieved via ion bombardment. Further, in certain embodiments, the voltage applied to the extraction plate can be pulsed to allow ion extraction and cleaning to occur simultaneously.

A semiconductor wafer and a semiconductor wafer fabrication method are provided. The wafer includes a supporting substrate, a semiconductor substrate and a contact layer. The supporting substrate has a first surface and a second surface opposite to the first surface. The semiconductor substrate is disposed on the first surface of the supporting substrate, in which the semiconductor substrate is configured to form plural devices. The contact layer is disposed on the second surface of the supporting substrate to contact the supporting substrate, in which the contact layer is configured to contact an electrostatic chuck and has a resistivity of the contact layer smaller than a resistivity of the supporting substrate. In semiconductor wafer fabrication method, at first, a raw wafer is provided. Then, the contact layer is formed by using an implantation operation or a deposition operation.

A method includes: receiving a first wafer; defining a first zone and a second zone on the first wafer and a plurality of first areas; defining a plurality of first areas and second areas for the first and second zones, respectively; projecting first ion beams onto the first areas and receiving first thermal waves in response to the first ion beams; rotating the first wafer by a twist angle; projecting second ion beams onto the second areas and receiving second thermal waves in response to the second ion beams; and estimating a first crystalline orientation angle of the first wafer based on the first and second ion beams and the first and second thermal waves.

A system for measuring and controlling the phase of an incoming analog waveform is disclosed. The system comprises an analog to digital converter to convert the incoming analog waveform to a digital representation. The system also includes a clock delay generator, which allows a programmable amount of delay to be introduced into the sample clock for the ADC. The system further comprises a controller to manipulate the delay used by the clock delay generator and store the outputs from the ADC. The controller can then use the digitized representation to determine the frequency of the incoming analog waveform, its phase drift and its phase relative to a master clock. The controller can then modify the output of a RF generator in response to these determinations.

An indirectly heated cathode ion source having an electrically isolated extraction plate is disclosed. By isolating the extraction plate, a different voltage can be applied to the extraction plate than to the body of the arc chamber. By applying a more positive voltage to the extraction plate, more efficient ion source operation with higher plasma density can be achieved. In this mode the plasma potential is increased, and the electrostatic sheath reduces losses of electrons to the chamber walls. By applying a more negative voltage, an ion rich sheath adjacent to the extraction aperture can be created. In this mode, conditioning and cleaning of the extraction plate is achieved via ion bombardment. Further, in certain embodiments, the voltage applied to the extraction plate can be pulsed to allow ion extraction and cleaning to occur simultaneously.