H01J2237/334

CONTROL OF MASK CD

A method for controlling a critical dimension of a mask layer is described. The method includes receiving a first primary parameter level, a second primary parameter level, a first secondary parameter level, a second secondary parameter level, and a third secondary parameter level. The method also includes generating a primary signal having the first primary parameter level, and transitioning the primary signal from the first primary parameter level to the second primary parameter level. The method further includes generating a secondary radio frequency (RF) signal having the first secondary parameter level, and transitioning the secondary RF signal from the first secondary parameter level to the second secondary parameter level. The method includes transitioning the secondary RF signal from the second secondary parameter level to the third secondary parameter level.

PROCESS GAS FOR CRYOGENIC ETCHING, PLASMA ETCHING APPARATUS, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME

A method of fabricating a semiconductor device comprises forming a mold layer on a substrate, forming a hardmask layer on the mold layer such that a portion of the mold layer is exposed, and using the hardmask layer to perform on the mold layer a cryogenic etching process. The cryogenic etching process includes supplying a chamber with a process gas including first and second process gases, and generating a plasma from the process gas. Radicals of the first process gas etch the exposed portion of the mold layer. Ammonium salt is produced based on the radicals etching the exposed portion of the mold layer. The second process gas includes an R—OH compound. The R is hydrogen, a C1 to C5 alkyl group, a C2 to C6 alkenyl group, a C2 to C6 alkynyl group, or a phenyl group. The second process gas reduces a production rate of the ammonium salt.

SEMICONDUCTOR DEVICE, SEMICONDUCTOR EQUIPMENT, AND SEMICONDUCTOR PROCESS METHOD
20230230816 · 2023-07-20 ·

A semiconductor device, a semiconductor equipment, and a semiconductor process method. The semiconductor process method includes a phase of wafer adsorption and a phase of wafer release and charge release. The phase of wafer adsorption includes: a power supply unit outputting an operating voltage to an electrostatic chuck, so as to control the electrostatic chuck to adsorb a wafer. The phase of wafer release and charge release includes: adjusting a voltage outputted by the power supply unit from the operating voltage to a charge release voltage, and maintaining for a first preset time to release some of the charges accumulated on the electrostatic chuck so as to avoid abnormal discharge; and switching the electrostatic chuck to be connected to a protective resistor, and maintaining for a second preset time to release the remaining charges accumulated on the electrostatic chuck.

PLASMA PROCESSING APPARATUS, AND METHOD AND PROGRAM FOR CONTROLLING ELEVATION OF FOCUS RING
20230013805 · 2023-01-19 · ·

A plasma processing apparatus includes a mounting table, an acquisition unit, a calculation unit, and an elevation control unit. The mounting table mounts thereon a target object as a plasma processing target. The elevation mechanism vertically moves a focus ring surrounding the target object. The acquisition unit acquires state information indicating a measured state of the target object. The calculation unit calculates a height of the focus ring at which positional relation between an upper surface of the target object and an upper surface of the focus ring satisfies a predetermined distance based on the state of the target object that is indicated by the state information acquired by the acquisition unit. The elevation control unit controls the elevation mechanism to vertically move the focus ring to the height calculated by the calculation unit.

Plasma processing apparatus

There is provision of a plasma processing apparatus including a processing vessel, a first member provided in the processing vessel, and a second member provided outside the first member. In at least one of the first member and the second member, a gas flow passage is formed, and the gas flow passage is configured to cause a gas to flow into a gap between the first member and the second member.

Substrate processing apparatus
11705346 · 2023-07-18 · ·

An upper member is disposed at an upper portion within a processing chamber. A ceiling member forms a ceiling of the processing chamber, and is provided with a through hole at a facing surface thereof which faces the upper member. A supporting member supports the upper member with a first end thereof located inside the processing chamber by being inserted through the through hole and slid within the through hole. An accommodation member accommodates therein a second end of the supporting member located outside the processing chamber, and is partitioned into a first space at a first end side and a second space at a second end side in a moving direction with respect to the second end. A pressure controller generates a pressure difference between the first space and the second space. The pressure difference allows the supporting member to be moved.

Etching method and plasma processing apparatus
11705339 · 2023-07-18 · ·

A disclosed etching method includes (a) generating plasma of a processing gas in a chamber of a plasma processing apparatus. The plasma is generated in a state where a substrate is placed on a substrate support having a lower electrode in the chamber. The substrate has a film and a mask. The mask is provided on the film. The etching method further includes (b) etching the film by supplying ions from the plasma to the substrate by periodically applying a pulse of a voltage to a lower electrode. In the operation (b), a level of a voltage of the pulse is changed at least once such that an absolute value of a negative potential of the substrate has a tendency to increase according to progress of etching of the film.

PLASMA RESISTANT MEMBER, PLASMA TREATMENT DEVICE COMPONENT, AND PLASMA TREATMENT DEVICE
20230019508 · 2023-01-19 ·

The present disclosure relates to a plasma resistant member in which a surface exposed to plasma is formed from a single crystal yttrium⋅aluminum⋅garnet (YAG) having a {100} plane, and a plasma treatment device component and a plasma treatment device using the plasma resistant member. When there are a plurality of surfaces exposed to plasma, at least a surface required to have the highest plasma resistance is formed from the single crystal YAG having a {100} plane.

NEW TUNGSTEN-BASED THERMAL SPRAY COATING AND MATERIAL FOR THERMAL SPRAYING TO OBTAIN IT

To provide a new tungsten-based thermal spray coating suitable as e.g. a component for plasma etching device using halogen gas, and a material for thermal spraying for obtaining the thermal spray coating.

A thermal spray coating characterized by containing tungsten as a matrix phase and oxides containing silicon and boron as a dispersed phase, and a component for plasma etching device having such a thermal spray coating. A material for thermal spraying characterized by containing from 1 to 7 wt % of silicon, from 0.5 to 3 wt % of boron and the reminder being tungsten and unavoidable impurities, and a method for producing a thermal spray coating by thermally spraying the material for thermal spraying.

SYMMETRIC SEMICONDUCTOR PROCESSING CHAMBER
20230020539 · 2023-01-19 ·

In one example, a flow module. The flow module has an inner wall and an outer wall equal-distant from the central axis. The flow module has radial walls connected between the outer wall and the inner wall, wherein the outer wall, inner wall and two or more pairs of radial walls define evacuation channels and a center portion. The center portion and evacuation channels are fluidly isolated from each other in the flow module. Two or more through holes are formed through the outer wall and fluidly coupled to the center portion. At least two of the two or more through holes are 180 degrees apart and linearly aligned through the central axis.