A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.

The present invention relates to a thermal processing method for wafer. A wafer is placed in an environment filled with a non-oxygenated gas mixture comprising deuterium gas and at least one kind of low active gas, and a rapid heating processing process is performed on a surface of the wafer to heat the wafer to a predetermined high temperature. Then, the wafer is placed in an environment filled with an oxygenated gas mixture, and a rapid cooling processing process is performed on a surface of the wafer. As a result, a denuded zone is formed on the surface of the wafer, deuterium atoms, which may be released to improve characteristics at an interface of semiconductor devices in a later fabrication process, are held in the wafer, and bulk micro-defects are formed far from the semiconductor devices.

A method for preparing a single crystal silicon ingot and a wafer sliced therefrom are provided. The ingots and wafers comprise nitrogen at a concentration of at least about 1×10.sup.14 atoms/cm.sup.3 and/or germanium at a concentration of at least about 1×10.sup.19 atoms/cm.sup.3, interstitial oxygen at a concentration of less than about 6 ppma, and a resistivity of at least about 1000 ohm cm.

A semiconductor wafer includes a surface having at least one recess including an inner wall surface. The inner wall surface is exposed.

A method for manufacturing a nitride semiconductor substrate by using a vapor phase growth method, including: a step of preparing a base substrate of a single crystal of a group III nitride semiconductor and in which a low index crystal plane closest to a main surface is a (0001) plane; an etching step of the base substrate to roughen the main surface; a first step of growing a first layer by epitaxially growing a single crystal of a group III nitride semiconductor on the main surface, and at least some of the plurality of recessed portions being gradually expanded toward an upper side of the main surface of the base substrate, the first layer including a first surface from which the (0001) plane has disappeared and that is constituted only by the inclined interfaces; and a second step of growing a second layer including a mirror second surface.

Provided are a GaN crystal used in a substrate for a nitride semiconductor device having a horizontal device structure such as GaN-HEMT, and a substrate used for production of a nitride semiconductor device having a horizontal device structure such as GaN-HEMT. The Gab crystal has a (0001) surface having an area of not less than 5 cm.sup.2, the (0001) surface having an inclination of not more than 10° with respect to the (0001) crystal plane, wherein the Fe concentration is not less than 5×10.sup.17 atoms/cm.sup.3 and less than 1×10.sup.9 atoms/cm.sup.3, and wherein the total donor impurity concentration is less than 5×10.sup.16 atoms/cm.sup.3.

A method may include thinning a silicon wafer to a particular thickness. The particular thickness may be based on a passband frequency spectrum of an adjustable optical filter. The method may also include covering a surface of the silicon wafer with an optical coating. The optical coating may filter an optical signal and may be based on the passband frequency spectrum. The method may additionally include depositing a plurality of thermal tuning components on the coated silicon wafer. The plurality of thermal tuning components may adjust a passband frequency range of the adjustable optical filter by adjusting a temperature of the coated silicon wafer. The passband frequency range may be within the passband frequency spectrum. The method may include dividing the coated silicon wafer into a plurality of silicon wafer dies. Each silicon wafer die may include multiple thermal tuning components and may be the adjustable optical filter.

Implementations of a method of forming a plurality of semiconductor devices on a semiconductor substrate may include: providing a semiconductor substrate having a first surface, a second surface, a size, and a thickness where the second surface opposes the first surface and the thickness is between the first surface and the second surface. The method may include processing the semiconductor substrate through a plurality of semiconductor device fabrication processes to form a plurality of semiconductor devices on the first surface. The thickness may be between 100 microns and 575 microns and the size may be 150 mm. The semiconductor substrate may not be coupled with a carrier or support.

Provided is an indium phosphide substrate having good accuracy of flatness of the orientation flat, and a method for producing the indium phosphide substrate. An indium phosphide substrate having a main surface and an orientation flat, wherein a difference between maximum and minimum values of a maximum height Pz in each of four cross-sectional curves is less than or equal to 1.50/10000 of a length in a longitudinal direction of an orientation flat end face, wherein the four cross-sectional curves are set at intervals of one-fifth of a thickness of the substrate on a surface excluding a width portion of 3 mm inward from both ends of the orientation flat end face in the longitudinal direction of the orientation flat end face, and the maximum height Pz in each of the four cross-sectional curves is measured in accordance with JIS B 0601:2013.

Provided is an indium phosphide substrate having good linearity accuracy of a ridge line where the main surface is in contact with the orientation flat, and a method for producing the indium phosphide substrate. An indium phosphide substrate having a main surface and an orientation flat, wherein a maximum value of deviation is less than 1/1000 of a length of a ridge line where the main surface is in contact with the orientation flat, when a plurality of measurement points are set at intervals of 2 mm from a start point to an end point at the ridge line, except for a length portion of 3 mm inward from both ends of the ridge line, and based on a reference line which is a straight line connecting the start point and the end point, a distance of each measurement point from the reference line is defined as the deviation of each measurement point.