Disclosed herein are systems and methods for treating the surface of a microelectronic substrate, using a cryogenic fluid mixture used to treat an exposed surface of the microelectronic substrate. The fluid mixture may be expanded through a nozzle to form an aerosol spray or gas cluster jet (GCJ) spray may impinge the microelectronic substrate and remove particles from the microelectronic substrate's surface. The fluid mixture may include nitrogen, argon, helium, neon, xenon, krypton, carbon dioxide, or any combination thereof. The incoming fluid mixture may be maintained pressure greater than atmospheric pressure and at a temperature greater than the condensation temperature of the fluid mixture. The fluid mixture may be expanded into the treatment chamber to form an aerosol or gas cluster spray. In this embodiment, the nozzle may be positioned within 50 mm of the microelectronic substrate during the treatment, more preferably within 10 mm of the microelectronic substrate.

Disclosed herein are systems and methods for treating the surface of a microelectronic substrate, and in particular, relate to an apparatus and method for scanning the microelectronic substrate through a cryogenic fluid mixture used to treat an exposed surface of the microelectronic substrate. The fluid mixture may be expanded through a nozzle to form an aerosol spray or gas cluster jet (GCJ) spray may impinge the microelectronic substrate and remove particles from the microelectronic substrate's surface. In one embodiment, the fluid mixture may be maintained to prevent liquid formation within the fluid mixture prior to passing the fluid mixture through the nozzle. The fluid mixture may include nitrogen, argon, helium, neon, xenon, krypton, carbon dioxide, or any combination thereof.

A method of forming a gate stack that includes treating a semiconductor substrate with a wet etch chemistry to clean a surface of the semiconductor substrate and form an oxide containing interfacial layer, and converting the oxide containing interfacial layer to a binary alloy oxide based interlayer using a plasma deposition sequence including alternating a metal gas precursor and a nitrogen and/or hydrogen containing plasma. The method of forming the gate stack may further include forming a high-k dielectric layer atop the binary alloy oxide based interlayer.

The present disclosure generally relates to methods of selectively forming titanium silicides on substrates. The methods are generally utilized in conjunction with contact structure integration schemes. In one embodiment, a titanium silicide material is selectively formed on a substrate as an interfacial layer on a source/drain region. The titanium silicide layer may be formed at a temperature within range of about 400 degrees Celsius to about 500 degrees Celsius.

An array substrate, a manufacturing method thereof and a display apparatus are provided. The array substrate includes thin-film transistors (TFTs) and conductive electrodes; the TFT includes a gate electrode, a source electrode, a drain electrode and an active layer; the source electrode and the drain electrode are arranged in the same layer and at two ends of the active layer and at least directly partially contact the upper surface or the lower surface of the active layer; and the conductive electrode is directly disposed on the electrode. With improved layer structures of the array substrate, a plurality of layer structures is formed in one patterning process by stepped photoresist process, so as to reduce the frequency of patterning processes, better ensure the compactness of the array substrate, and guarantee good contact between the layer structures in the array substrate.

In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit, first to fourth supplying units, and a removing unit. A substrate holding and rotating unit holds a semiconductor substrate, having a convex pattern formed on its surface, and rotates the semiconductor substrate. A first supplying unit supplies a chemical onto the surface of the semiconductor substrate in order to clean the semiconductor substrate. A second supplying unit supplies pure water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A third supplying unit supplies a water repellent agent to the surface of the semiconductor substrate in order to form a water repellent protective film onto the surface of the convex pattern. A fourth supplying unit supplies alcohol, which is diluted with pure water, or acid water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A removing unit removes the water repellent protective film with the convex pattern being left.

An interface station of a coating and developing treatment system has: a cleaning unit cleaning at least a rear surface of a wafer before the wafer is transferred into an exposure apparatus; an inspection unit inspecting the rear surface of the cleaned wafer whether the wafer is exposable, before it is transferred into the exposure apparatus; wafer transfer mechanisms including arms transferring the wafer between the units and a wafer transfer control part controlling operations of the wafer transfer mechanisms. When it is determined that a state of the wafer becomes an exposable state by re-cleaning in the cleaning unit as a result of the inspection, the wafer transfer control part controls the wafer transfer mechanisms to transfer the wafer again to the cleaning unit.

An interface station of a coating and developing treatment system has: a cleaning unit cleaning at least a rear surface of a wafer before the wafer is transferred into an exposure apparatus; an inspection unit inspecting the rear surface of the cleaned wafer whether the wafer is exposable, before it is transferred into the exposure apparatus; wafer transfer mechanisms including arms transferring the wafer between the units and a wafer transfer control part controlling operations of the wafer transfer mechanisms. When it is determined that a state of the wafer becomes an exposable state by re-cleaning in the cleaning unit as a result of the inspection, the wafer transfer control part controls the wafer transfer mechanisms to transfer the wafer again to the cleaning unit.

A method of forming a gate stack that includes treating a semiconductor substrate with a wet etch chemistry to clean a surface of the semiconductor substrate and form an oxide containing interfacial layer, and converting the oxide containing interfacial layer to a binary alloy oxide based interlayer using a plasma deposition sequence including alternating a metal gas precursor and a nitrogen and/or hydrogen containing plasma. The method of forming the gate stack may further include forming a high-k dielectric layer atop the binary alloy oxide based interlayer.

Semiconductor devices and fin field effect transistors (FinFETs) are disclosed. In some embodiments, a representative semiconductor device includes a group III material over a substrate, the group III material comprising a thickness of about 2 monolayers or less, and a group III-V material over the group III material.