Patent classifications
H01L21/02076
SELECTIVE ION FILTERING IN A MULTIPURPOSE CHAMBER
A multipurpose semiconductor process chamber includes a vessel wall that encloses contiguous first and second volumes of the multipurpose chamber, and means for selectively effectively preventing ions moving across a plane that partitions the first volume from the second volume. For example, the means can include an electromagnet, or at least one permanent magnet, that is operable to impose and remove a magnetic field with field lines extending in the plane.
Cleaning apparatus and substrate processing apparatus
The cleaning apparatus includes multiple kinds of cleaning modules each configured to perform a cleaning processing of a substrate, a first accommodating section configured to accommodate the multiple kinds of cleaning modules therein, and a fluid supply section configured to supply a fluid to the cleaning modules accommodated in the first accommodating section through a pipe. Each of the multiple kinds of cleaning modules includes a pipe connection portion having a common connection position to be connected with the pipe.
Wafer processing method
A wafer processing method includes: a holding step of holding a wafer on a chuck table through a dicing tape; and a dividing step of cutting the wafer along division lines by a cutting blade. In the dividing step, cleaning water including pure water mixed with carbon dioxide is supplied to the front surface of the wafer, and cutting water including pure water alone or pure water mixed with carbon dioxide in a concentration lower than that of the cleaning water is supplied to the cutting blade. During cutting, therefore, the cleaning water and the cutting water are always shielded by each other. Consequently, the cutting blade can be prevented from being corroded or excessively worn due to the cleaning water, and the cutting water can be prevented from contacting the front surface of the wafer to cause electrostatic discharge damage to the devices.
BONDING METHOD OF SEMICONDUCTOR CHIP AND BONDING APPARATUS OF SEMICONDUCTOR CHIP
A bonding method of a first member includes arranging an activated front surface of a first member and an activated front surface of a second member so as to face each other with a back surface of the first member attached to a sheet, pushing a back surface of the first member through the sheet to closely attach the activated front surface of the first member and the activated front surface of the second member, and stripping the sheet from the back surface of the first member while maintaining a state in which the activated front surface of the first member is closely attached to the activated front surface of the second member.
POST CMP PROCESSING FOR HYBRID BONDING
Devices and techniques include process steps for forming openings through stacked and bonded structures. The openings are formed by pre-etching through one or more layers of prepared dies after planarization of the bonding layer (by chemical-mechanical polishing (CMP) or the like) and prior to bonding. For instance, the openings are etched through one or more layers of dies to be bonded prior to bonding the dies to form an assembly.
PLASMA PROCESSING APPARATUS, WAFER TO WAFER BONDING SYSTEM AND WAFER TO WAFER BONDING METHOD
A plasma processing apparatus includes a load lock chamber switchable between an atmospheric pressure state and a vacuum pressure state, and a substrate processing apparatus configured to transfer a substrate to and from the load lock chamber and to perform a plasma process on a surface of the substrate in a plasma chamber under a vacuum atmosphere. The substrate processing apparatus includes a substrate stage disposed within the plasma chamber and configured to support the substrate, a plasma gas supply configured to supply a plasma gas into the plasma chamber, a steam supply configured to supply a water vapor into the plasma chamber, and a plasma generator configured to generate a plasma in the plasma chamber.
COATING COMPOSITION FOR WAFER PROTECTION AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE USING THE SAME
A coating composition for wafer protection and a method of manufacturing a semiconductor package, the coating composition includes a solvent; about 1 weight percent (wt %) to about 40 wt % of a water-soluble polymer; and about 0.01 wt % to about 30 wt % of a nano light-emitting filler.
Post Etch Defluorination Process
Defluorination processes for removing fluorine residuals from a workpiece such as a semiconductor wafer are provided. In one example implementation, a method for processing a workpiece can include supporting a workpiece on a workpiece support. The workpiece can have a photoresist layer. The workpiece can have one or more fluorine residuals on a surface of the workpiece. The method can include performing a defluorination process on the workpiece at least in part using a plasma generated from a first process gas. The first process gas can include a hydrogen gas. Subsequent to performing the defluorination process, the method can include performing a plasma strip process on the workpiece to at least partially remove a photoresist layer from the workpiece.
METHOD OF REDUCING RESIDUAL CONTAMINATION IN SINGULATED SEMICONDUCTOR DIE
A method for processing electronic die includes providing a substrate having a plurality of electronic die formed as part of the substrate and separated from each other by spaces. The method includes placing the substrate onto a first carrier substrate. The method includes plasma etching the substrate through the spaces to form singulation lines adjacent the plurality of electronic die. The method includes exposing the plurality of electronic die to solvent vapors, such as heated solvent vapors, under reduced pressure to reduce the presence of residual contaminants resulting from the plasma etching step.
DIE CLEANING SYSTEMS AND RELATED METHODS
Implementations of methods of forming a plurality of semiconductor die may include forming a damage layer beneath a surface of a die street in a semiconductor substrate, singulating the semiconductor substrate along the die street into a plurality of semiconductor die, and removing one or more particulates in the die street after singulating through applying sonic energy to the plurality of semiconductor die.