Patent classifications
H01L21/02096
Substrate cleaning method and substrate cleaning apparatus
According to one embodiment of the present disclosure, provided is a substrate cleaning method that performs an operation, in a state where a cleaning member is in contact with a rotating substrate, the cleaning member is moved between a first position on the substrate and a second position close to an edge of the substrate, n times (n is an integer of 2 or more), wherein a controller, which controls a driver that moves the cleaning member, controls the driver to perform an edge cleaning step to perform cleaning of the substrate in a state where the cleaning member is in contact with the second position on the substrate for a predetermined period of time after the cleaning member reaches the second position at least in one operation of the first to the (n-1)th operations.
Method for cleaning semiconductor wafer backside surface by hybrid brush assembly
In accordance with some embodiments, a wafer processing method is provided. The wafer processing method includes placing a semiconductor wafer on a wafer stage with a backside surface of the semiconductor wafer facing downwardly. The wafer processing method further includes positioning a first brush assembly below the backside surface of the semiconductor wafer. The wafer processing method also includes moving a first brush assembly toward the backside surface of the semiconductor wafer to a first position. At the first position, an inner brush member and an outer brush member of the first brush assembly, made of different materials, are in contact with the backside surface of the semiconductor wafer. In addition, the wafer processing method includes rotating the first brush assembly relative to the semiconductor wafer while the first brush assembly is in the first position.
TREATING A SILICON ON INSULATOR WAFER IN PREPARATION FOR MANUFACTURING AN ATOMISTIC ELECTRONIC DEVICE INTERFACED WITH A CMOS ELECTRONIC DEVICE
A method for treating a wafer is provided with a portion of a semiconductor layer is selectively removed from the wafer so as to create an inactive region of the wafer surrounding a first active region of the wafer. The inactive region of the wafer has an exposed portion of an insulator layer, but none of the semiconductor layer. The first active region of the wafer includes a first portion of the semiconductor layer and a first portion of the insulator layer. At least one conductor is formed in contact with the first portion of the semiconductor layer, such that the conductor and the first portion of the semiconductor layer form a portion of an electrical circuit. The first active region of the wafer is selectively treated to remove a native oxide layer from the first portion of the semiconductor layer. A resulting wafer is also disclosed.
SYSTEM AND METHOD FOR CLEANING CONTACT ELEMENTS AND SUPPORT HARDWARE USING FUNCTIONALIZED SURFACE MICROFEATURES
A cleaning material, device, and method for predictably cleaning the contact elements and support hardware of a tester interface, such as a probe card and a test socket, in which the cleaning pad has a predetermined configuration appropriate for the particular pin contact elements and a substrate having a defined functionalized surface topology and geometry which can be introduced into the testing apparatus during the normal testing operations. The cleaning material has a predetermined topography with a plurality of functional 3-dimensional (3D) microstructures that provide performance characteristics which are not possible with a non-functionalized and flat surface.
Buff processing device and substrate processing device
In-plane uniformity of buff processing is improved. According to a first form, a buff processing device for executing buff processing of a substrate is provided. Such buff processing device has a rotatable shaft, a buff head body, a torque transmission mechanism for transmitting rotation of the shaft to the buff head body, and an elastic member for elastically supporting the buff head body in a longitudinal direction of the shaft.
Substrate processing apparatus and substrate processing method
A substrate processing apparatus includes an upper cup part including a first tubular portion and a second tubular portion that are formed each in a tubular shape capable of surrounding a substrate held by a substrate holder, the second tubular portion being connected to an upper side of the first tubular portion. The substrate processing apparatus also includes a cup moving unit that moves the upper cup part in a vertical direction with respect to the substrate holder to stop the upper cup part at each of a position where the first tubular portion surrounds the substrate, and a position where the second tubular portion surrounds the substrate.
Substrate processing apparatus, substrate processing method and recording medium
Contamination of a bottom surface of a substrate caused by a processing liquid used for cleaning a top surface of the substrate can be suppressed. After performing a liquid processing on the top surface of the substrate and a liquid processing on the bottom surface of the substrate in parallel while rotating the substrate by a substrate holding/rotating unit, when stopping the liquid processing on the top surface of the substrate and the liquid processing on the bottom surface of the substrate, a control unit 18 stops a supply of the processing liquid onto the top surface of the substrate by a first processing liquid supply device 73, and then, stops a supply of the processing liquid onto the bottom surface of the substrate by a second processing liquid supply device 71.
SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE CLEANING METHOD
Provided is a substrate processing apparatus including: a first cleaning member configured to clean a substrate by a contact face on which a skin layer is provided; and a second cleaning member configured to clean the substrate after cleaned by the first cleaning member, by a contact face on which a skin layer is not provided.
METHOD FOR CLEANING SEMICONDUCTOR WAFER BACKSIDE SURFACE BY HYBRID BURSH ASSEMBLY
In accordance with some embodiments, a wafer processing method is provided. The wafer processing method includes placing a semiconductor wafer on a wafer stage with a backside surface of the semiconductor wafer facing downwardly. The wafer processing method further includes positioning a first brush assembly below the backside surface of the semiconductor wafer. The wafer processing method also includes moving a first brush assembly toward the backside surface of the semiconductor wafer to a first position. At the first position, an inner brush member and an outer brush member of the first brush assembly, made of different materials, are in contact with the backside surface of the semiconductor wafer. In addition, the wafer processing method includes rotating the first brush assembly relative to the semiconductor wafer while the first brush assembly is in the first position.
TREATING A SILICON ON INSULATOR WAFER IN PREPARATION FOR MANUFACTURING AN ATOMISTIC ELECTRONIC DEVICE INTERFACED WITH A CMOS ELECTRONIC DEVICE
A method for treating a wafer is provided with a portion of a semiconductor layer is selectively removed from the wafer so as to create an inactive region of the wafer surrounding a first active region of the wafer. The inactive region of the wafer has an exposed portion of an insulator layer, but none of the semiconductor layer. The first active region of the wafer includes a first portion of the semiconductor layer and a first portion of the insulator layer. At least one conductor is formed in contact with the first portion of the semiconductor layer, such that the conductor and the first portion of the semiconductor layer form a portion of an electrical circuit. The first active region of the wafer is selectively treated to remove a native oxide layer from the first portion of the semiconductor layer. A resulting wafer is also disclosed.