A light emitting element and display device are disclosed. In one example, a light emitting element includes a first electrode formed on a base body. A first insulation layer is formed on the base body and the first electrode and has an aperture portion in which a part of the first electrode is exposed. A second insulation layer is formed on the first insulation layer and has a protruding end portion protruding from the aperture portion. A third insulation layer is formed on the second insulation layer and has an end portion recessed from the protruding end portion. A charge injection/transport layer is formed over the second insulation layer and the third insulation layer. An organic layer includes a light emitting layer, and a second electrode formed on the organic layer. At least a part of the charge injection/transport layer is discontinuous at the protruding end portion.

Embodiments of the present disclosure provide a touch substrate and a fabrication method thereof, and an electronic device. The fabrication method of the touch substrate includes: providing a substrate; and sequentially forming a first touch electrode layer, a first insulating layer, a second touch electrode layer and a second insulating layer on the substrate. The first touch electrode layer includes a first touch electrode, and the second touch electrode layer includes a second touch electrode. The step of forming the first insulating layer and the step of forming the second insulating layer are performed by using a single mask.

A semiconductor device includes a substrate including an active pattern, a pair of channel patterns spaced apart from each other in a first direction on the active pattern, each of the pair of channel patterns including vertically stacked semiconductor patterns, a source/drain pattern between the pair of channel patterns, a pair of gate electrodes on the channel patterns, an active contact between the pair of gate electrodes, and outer spacers on side surfaces of the pair of gate electrodes. A distance between the outer spacers spaced apart from each other with the active contact therebetween is smaller than a width of the source/drain pattern in the first direction at a first level at which an upper surface of an uppermost semiconductor pattern among the semiconductor patterns is positioned.

A film forming device includes an adhesion preventing mechanism in a film formation chamber, in which the adhesion preventing mechanism is configured with a plurality of adhesion preventing plates including at least a substrate edge adhesion preventing plate that is provided on an edge of a region on the substrate holding portion where the substrate is provided and a substrate outer peripheral region adhesion preventing plate that is disposed on an outer periphery of the substrate edge adhesion preventing plate to be spaced from the substrate edge adhesion preventing plate, a potential adjusting mechanism that is electrically connected to any one of the substrate edge adhesion preventing plate or the substrate outer peripheral region adhesion preventing plate is provided, and the adhesion preventing plate connected to the potential adjusting mechanism and an adhesion preventing plate disposed adjacent thereto are disposed at an interval of 0.5 mm to 3.0 mm.

The present disclosure relates to the technical field of semiconductors, and discloses a semiconductor device and a manufacturing method therefor. The method includes: providing a substrate structure, where the substrate structure includes: a substrate having a first device region and a second device region, a first dummy gate structure at the first device region, a second dummy gate structure at the second device region, and an LDD region below the first dummy gate structure. The first dummy gate structure includes a first dummy gate dielectric layer at the first device region, a first dummy gate on the first dummy gate dielectric layer, and a first spacer layer at a side wall of the first dummy gate. The second dummy gate structure includes a second dummy gate dielectric layer at the second device region, a second dummy gate on the second dummy gate dielectric layer, and a second spacer layer at a side wall of the second dummy gate. The method further includes removing the first dummy gate; etching back the first spacer layer to reduce a thickness of the first spacer layer; removing an exposed portion of the first dummy gate dielectric layer to form a first trench; and removing the second dummy gate and exposed second dummy gate dielectric layer to form a second trench.

A film forming apparatus includes a reaction chamber, a pedestal disposed inside the reaction chamber and configured to support a substrate, and a gas shower head over the pedestal. The gas shower head includes a plurality of first holes and a plurality of second hole disposed between a circumference of the gas shower head and the first holes. The first holes are arranged to form a first pattern and configured to form a first portion of a material film on the substrate. The second holes are arranged to form a second pattern and configured to form a second portion of the material film on the substrate. A hole density of the second pattern is greater than a hole density of the first pattern.

The present disclosure relates to a hydrogen sensor and a method for manufacturing the same, and more particularly, to a hydrogen sensor having a vertical nanogap structure, in which a nanogap is formed below a sensor portion to bring the sensor portion and an electrode into contact with each other when the sensor portion reacts with hydrogen, so as to allow the sensor portion to expand and contract freely without resistance on a substrate, thereby improving hydrogen sensing accuracy, and it is possible to form a precise nanogap with uniformity and reproducibility at a low cost and a method for manufacturing the same.

Methods for treating a thin film made from a conductive or semiconductive material may improve the crystalline quality thereof. Such methods may include: supplying a substrate including, on one of the faces thereof, a thin film of the material; and biased plasma treating the assembly formed by the substrate and the thin film at a given temperature and for a given time, so as to obtain a crystalline reorganization over a depth of the thin film, the biased plasma treatment including an electrical biasing of the thin film and an exposure of the film thus biased to a hydrogen plasma, the biased plasma treatment being implemented at a temperature that is below the melting points of the thin film and of the substrate.

A system for processing semiconductor wafers, the system including: a processing chamber; a heat source; a substrate holder configured to expose a semiconductor wafer to the heat source; a first electrode configured to be detachably coupled to a first major surface of a semiconductor wafer; and a second electrode coupled to the substrate holder, the first electrode and the second electrode together configured to apply an electric field in the semiconductor wafer.

A light emitting element and display device are disclosed. In one example, a light emitting element includes a first electrode formed on a base body. A first insulation layer is formed on the base body and the first electrode and has an aperture portion in which a part of the first electrode is exposed. A second insulation layer is formed on the first insulation layer and has a protruding end portion protruding from the aperture portion. A third insulation layer is formed on the second insulation layer and has an end portion recessed from the protruding end portion. A charge injection/transport layer is formed over the second insulation layer and the third insulation layer. An organic layer includes a light emitting layer, and a second electrode formed on the organic layer. At least a part of the charge injection/transport layer is discontinuous at the protruding end portion.