Disclosed are methods and systems for depositing layers comprising vanadium, nitrogen, and element selected from the list consisting of molybdenum, tantalum, niobium, aluminum, and silicon. The layers are deposited onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.

A semiconductor device has a semiconductor substrate with a dielectric layer disposed thereon. A trench is defined in the dielectric layer. A metal gate structure is disposed in the trench. The metal gate structure includes a first layer and a second layer disposed on the first layer. The first layer extends to a first height in the trench and the second layer extends to a second height in the trench; the second height is less than the first height.

A display apparatus may include a base substrate including a first portion and a second portion smaller than the first portion, a plurality of pixels disposed on the first portion, a protection substrate disposed below the base substrate, and a groove disposed in a portion of the protection substrate and overlapped with the second portion. The groove may include a first region extending in a first direction, and a second region and a third region, which are arranged along the first direction, wherein the first region is interposed between the second region and the third region. The first and second portions may be arranged in a second direction crossing the first direction, and a width of each of the second and third regions may be larger than a first width of the first region, when measured in the second direction.

A system is provided. The system includes a 3D printer, which includes a first dispenser and a second dispenser. The first dispenser is configured to apply conductive material to a surface, and the second dispenser is configured to apply conductive diamonds to a surface. The conductive material includes a mixture of an elastomer and at least one of nickel and silver, and the conductive diamonds are between 1 and 10 microns in size.

A method of forming a pattern of metallic material on a substrate includes providing a plurality of void regions on a surface of the substrate. At a first temperature, a first layer of a first metallic material of a eutectic-forming pair of metallic materials is deposited on the substrate to form a conformal metallic film over the substrate and over the surfaces of the plurality of void regions. The substrate and conformal metallic film are warmed to a second temperature greater than a eutectic-liquid-formation temperature of the eutectic pair of metallic materials. At the second temperature, the second metallic material of the eutectic-forming pair of metallic materials is deposited on the conformal metallic film to initiate a eutectic-liquid-forming reaction, such that the plurality of void regions are filled with a mixture of the first and second metallic materials of the eutectic-forming pair of metallic materials.

A method for fabricating a semiconductor device including a self-aligned top via includes subtractively etching a conductive layer to form at least a first conductive line on a substrate. After the subtractive etching, the method further includes forming a barrier layer along the substate and along the first conductive line, planarizing at least portions of the barrier layer to obtain at least an exposed first conductive line, recessing at least the exposed first conductive line to form a first recessed conductive line, and forming conductive material in a via opening on the first recessed conductive line.

The present application discloses a method for fabricating a semiconductor device. The method includes forming a first dielectric layer on a substrate; forming an expanded hole in the first dielectric layer; conformally forming an adhesive layer in the expanded hole by a first chemical vapor deposition process; conformally forming a first conductive layer on the adhesive layer by a second chemical vapor deposition process; and forming a first conductive structure on the first conductive layer by a third chemical vapor deposition process. The adhesive layer, the first conductive layer, and the first conductive structure together configure a composite contact structure. The second chemical vapor deposition process includes an initial deposition step and subsequent deposition cycles repeated until the first conductive layer is formed to a predetermined thickness

Disclosed a transient voltage suppressor and a method for manufacturing the same. According to the transient voltage suppressor, an additional gate stack layer is introduced based on the prior transient voltage suppressor, and the diffusion isolation regions are reused as the conductive vias, so that, the gate stack layer, the first doped region, the conductive vias, and the second semiconductor layer constitute a MOS transistor being coupled in parallel to the Zener diode or the avalanche diode of the transient voltage suppressor. When the current of the I/O terminal is relatively large, the MOS transistor is turned on to share part of the current of the I/O terminal through the Zener diode or the avalanche diode, thereby protecting the Zener diode or the avalanche diode from being damaged due to excessive current. Thus, the robustness of the transient voltage suppressor is improved without increasing the manufacture cost.

Aspects of the present technology are directed toward Integrated Circuits (IC) including a plurality of trenches disposed in a substrate about a set of silicide regions. The trenches can extend down into the substrate below the set of silicide regions. The silicide regions can be formed by implanting metal ions into portions of a substrate exposed by a mask layer with narrow pitch openings. The trenches can be formed by selectively etching the substrate utilizing the set of silicide regions as a trench mask. An semiconductor material with various degree of crystallinity can be grown from the silicide regions, in openings that extend through subsequently formed layers down to the silicide regions.

A semiconductor device has a semiconductor substrate with a dielectric layer disposed thereon. A trench is defined in the dielectric layer. A metal gate structure is disposed in the trench. The metal gate structure includes a first layer and a second layer disposed on the first layer. The first layer extends to a first height in the trench and the second layer extends to a second height in the trench; the second height is less than the first height.