Embodiments of the present disclosure describe multi-layer graphene assemblies including a layer of fluorinated graphene, dies and systems containing such structures, as well as methods of fabrication. The fluorinated graphene provides an insulating interface to other graphene layers while maintaining the desirable characteristics of the nonfluorinated graphene layers. The assemblies provide new options for utilizing graphene in integrated circuit devices and interfacing graphene with other materials. Other embodiments may be described and/or claimed.

New compositions of matter and device constructs are disclosed in the form of diamond material layers or films having one or more surfaces treated with chemically active radicals, e.g., photo-radical or thermal-radical generators to reduce and stabilize their surface resistance. The compositions exhibit stable, markedly lower surface resistances, e.g., below about 3 k sq.sup.1 or between about 3 and 2 k sq.sup.1 or below 2 k sq.sup.1, or below 1 k sq.sup.1, or lower. In certain embodiments, the diamond material is a epitaxial layer grown on a substrate, e.g., by microwave plasma chemical vapor deposition (CVD) and can have a thickness ranging from about 1 nm to 1 mm, preferably from about 10 nm to 500 m, or from about 100 nm to 10 m. The invention also encompasses semiconductor devices fabricated from the surface-modified diamond materials disclosed herein. For example, device can be a field effect transistor in which the diamond material provides a hole conductivity channel between a source region and a drain region that is activated by a voltage applied to an intermediate gate region. Methods are also disclosed for modifying diamond surfaces to decrease and stabilize their surface resistance.

In various embodiments, a method for processing a carrier is provided. The method for processing a carrier may include: forming a first catalytic metal layer over a carrier; forming a source layer over the first catalytic metal layer; forming a second catalytic metal layer over the source layer, wherein the thickness of the second catalytic metal layer is larger than the thickness of the first catalytic metal layer; and subsequently performing an anneal to enable diffusion of the material of the source layer forming an interface layer adjacent to the surface of the carrier from the diffused material of the source layer.

Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The system may include a diamond material having n-type donor atoms and a diamond lattice, wherein 0.16% of the donor atoms contribute conduction electrons with mobility greater than 770 cm2/Vs to the diamond lattice at 100 kPa and 300K. The method of fabricating diamond semiconductors may include the steps of selecting a diamond material having a diamond lattice; introducing a minimal amount of acceptor dopant atoms to the diamond lattice to create ion tracks; introducing substitutional dopant atoms to the diamond lattice through the ion tracks; and annealing the diamond lattice.

A method for manufacturing a SiC semiconductor device includes the steps of: forming an impurity region in a SiC layer; forming a first carbon layer on a surface of the SiC layer having the impurity region formed therein, by selectively removing silicon from the surface; forming a second carbon layer on the first carbon layer; and heating the SiC layer having the first carbon layer and the second carbon layer formed therein.

Embodiments of the present disclosure describe multi-layer graphene assemblies including a layer of fluorinated graphene, dies and systems containing such structures, as well as methods of fabrication. The fluorinated graphene provides an insulating interface to other graphene layers while maintaining the desirable characteristics of the nonfluorinated graphene layers. The assemblies provide new options for utilizing graphene in integrated circuit devices and interfacing graphene with other materials. Other embodiments may be described and/or claimed.