Patent classifications
H01L21/34
DISPLAY SUBSTRATE, MANUFACTURING METHOD AND DISPLAY DEVICE
The present disclosure provides a display substrate, a manufacturing method, and a display device. The display substrate includes: a base substrate; a thin film transistor located on the base substrate and including a source electrode, a drain electrode, a gate electrode and an active layer, and thicknesses of the source electrode and the drain electrode being less than a predetermined threshold; a protection layer located at a side of the thin film transistor away from the base substrate and including a first via hole and a second via hole, and a conductive connection pattern being arranged in the first via hole; and a data line arranged at a same layer and made of a same material as the gate electrode, the data line being coupled to the source electrode of the thin film transistor through the conductive connection pattern in the first via hole of the protection layer.
Die-on-Interposer Assembly with Dam Structure and Method of Manufacturing the Same
A semiconductor package includes an interposer chip having a frontside, a backside, and a corner area on the backside defined by a first corner edge and a second corner edge of the interposer chip. A die is bonded to the frontside of the interposer chip. At least one dam structure is formed on the corner area of the backside of the interposer chip. The dam structure includes an edge aligned to at least one the first corner edge and the second corner edge of the interposer chip.
Die-on-Interposer Assembly with Dam Structure and Method of Manufacturing the Same
A semiconductor package includes an interposer chip having a frontside, a backside, and a corner area on the backside defined by a first corner edge and a second corner edge of the interposer chip. A die is bonded to the frontside of the interposer chip. At least one dam structure is formed on the corner area of the backside of the interposer chip. The dam structure includes an edge aligned to at least one the first corner edge and the second corner edge of the interposer chip.
Coplanar double gate electrode oxide thin film transistor and manufacture method thereof
The present disclosure relates to a coplanar double gate electrode oxide thin film transistor, includes a substrate, a bottom gate electrode, a first gate electrode insulating layer, a oxide semiconductor layer, a source electrode contact area and a drain electrode contact area, a second gate electrode insulating layer and a top gate electrode, wherein, the upper surface of the substrate is recessed toward the inside of the substrate to form a groove, the bottom gate electrode is formed in the groove, so that the upper surface of the bottom gate electrode and the upper surface of the substrate are in the same horizontal plane. The thin film transistor of the present disclosure has the characteristics of the double gate electrode and the coplanar structure, and is capable of improving the stability of the thin film transistor, optimizing the response speed thereof, and lowering the driving voltage.
Coplanar double gate electrode oxide thin film transistor and manufacture method thereof
The present disclosure relates to a coplanar double gate electrode oxide thin film transistor, includes a substrate, a bottom gate electrode, a first gate electrode insulating layer, a oxide semiconductor layer, a source electrode contact area and a drain electrode contact area, a second gate electrode insulating layer and a top gate electrode, wherein, the upper surface of the substrate is recessed toward the inside of the substrate to form a groove, the bottom gate electrode is formed in the groove, so that the upper surface of the bottom gate electrode and the upper surface of the substrate are in the same horizontal plane. The thin film transistor of the present disclosure has the characteristics of the double gate electrode and the coplanar structure, and is capable of improving the stability of the thin film transistor, optimizing the response speed thereof, and lowering the driving voltage.
Thin film transistor, manufacturing method therefor, oxide back plate and display apparatus
Provided are a thin film transistor, a manufacturing method therefor, an oxide back plate and a display apparatus. The thin film transistor comprises: an oxide active layer (4) and source and drain electrodes (6a, 6b) connected to the oxide active layer (4), wherein the source and drain electrodes (6a, 6b) comprise a main portion (M) and a connective portion (C), the main portion (M) being isolated from the active layer (4), and being electrically connected to the active layer (4) via the connective portion (C), and an electrical resistivity of the connective portion (C) is greater than that of the main portion (M). In the thin film transistor provided above, since the main portions of the source and drain electrodes are not in contact with the oxide active layer, a metal with a relatively high electrical conductivity can be used as the source and drain electrodes, without having a relatively great impact on the electrical performance of the oxide active layer.
Thin film transistor, manufacturing method therefor, oxide back plate and display apparatus
Provided are a thin film transistor, a manufacturing method therefor, an oxide back plate and a display apparatus. The thin film transistor comprises: an oxide active layer (4) and source and drain electrodes (6a, 6b) connected to the oxide active layer (4), wherein the source and drain electrodes (6a, 6b) comprise a main portion (M) and a connective portion (C), the main portion (M) being isolated from the active layer (4), and being electrically connected to the active layer (4) via the connective portion (C), and an electrical resistivity of the connective portion (C) is greater than that of the main portion (M). In the thin film transistor provided above, since the main portions of the source and drain electrodes are not in contact with the oxide active layer, a metal with a relatively high electrical conductivity can be used as the source and drain electrodes, without having a relatively great impact on the electrical performance of the oxide active layer.
THIN FILM TRANSISTOR, DISPLAY SUBSTRATE AND DISPLAY DEVICE
Provided are a thin film transistor, a display substrate and a display device, the thin film transistor includes: a gate on a base substrate; an active layer between the gate and the base substrate, the active layer includes a source contact portion, a drain contact portion and a middle portion therebetween, orthographic projections of the middle portion and the gate on the base substrate overlaps to form a first overlapping region, a material of the middle portion includes a metal oxide containing a doped element, a dissociation energy of the doped element from an oxygen element is greater than 500 Kj/mol; a source connected to the source contact portion and a drain connected to the drain contact portion, a ratio of an area of the orthographic projection of the gate on the base substrate to an area of the first overlapping region is less than or equal to 3.
Method of manufacturing thin film transistor
The present application discloses a method of manufacturing a thin film transistor, including following steps: forming a gate electrode on the top surface of the substrate; depositing a gate insulating layer, a semiconductor material and an etching stop layer sequentially on the gate electrode; patterning the etching stop layer by a first mask to form a stopper; depositing a second metal layer; using a second mask and a photoresist to form a source electrode region, a drain electrode region and a channel region on the surface of the second metal layer; etching the periphery region of the source electrode region, the drain electrode region and the channel region to expose the gate insulating layer; removing the photoresist and etching the second metal layer within the channel, and form a source electrode and a drain electrode by the remaining second metal layer; and irradiating the bottom of the substrate.
Method of manufacturing thin film transistor
The present application discloses a method of manufacturing a thin film transistor, including following steps: forming a gate electrode on the top surface of the substrate; depositing a gate insulating layer, a semiconductor material and an etching stop layer sequentially on the gate electrode; patterning the etching stop layer by a first mask to form a stopper; depositing a second metal layer; using a second mask and a photoresist to form a source electrode region, a drain electrode region and a channel region on the surface of the second metal layer; etching the periphery region of the source electrode region, the drain electrode region and the channel region to expose the gate insulating layer; removing the photoresist and etching the second metal layer within the channel, and form a source electrode and a drain electrode by the remaining second metal layer; and irradiating the bottom of the substrate.